blob: 0e46300142ebf4556442fe10de81b86712808b59 [file] [log] [blame]
Ying-Chun Liu (PaulLiu)e612f682021-11-05 17:13:24 +08001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2021 Linaro
4 */
5
6/dts-v1/;
7/plugin/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11
12#include "imx8mm-pinfunc.h"
13
14&{/} {
15 clocks {
16 #address-cells = <1>;
17 #size-cells = <0>;
18 clk40m: clk@1 {
19 compatible = "fixed-clock";
20 reg = <1>;
21 #clock-cells = <0>;
22 clock-frequency = <40000000>;
23 clock-output-names = "clk40m";
24 };
25 };
26};
27
28&ecspi2 {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 can0: can@0 {
33 compatible = "microchip,mcp2518fd";
34 reg = <0>;
35 microchip,rx-int = <&gpio4 31 IRQ_TYPE_LEVEL_LOW>;
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_can0>;
38 interrupt-parent = <&gpio5>;
39 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
40 spi-max-frequency = <20000000>;
41 clocks = <&clk40m>;
42 status = "okay";
43 };
44};
45
46&iomuxc {
47 pinctrl_can0: can0grp {
48 fsl,pins = <
49 MX8MM_IOMUXC_SAI3_TXC_GPIO5_IO0 0x00
50 MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x00
51 >;
52 };
53};