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git01.mediatek.com / filogic / uboot / 355729dd1c98dc5cfaa59e86a74334ac233b66b2 / . / configs / orangepi_zero2_defconfig
blob: f13735e91c7323629ae3398e0a31495669dca79c [file] [log] [blame]
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_SUNXI=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]3CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-orangepi-zero2"
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]4CONFIG_SPL=y
Jernej Skrabecdd533da2023-04-10 10:21:12 +0200[diff] [blame]5CONFIG_DRAM_SUN50I_H616_DX_ODT=0x08080808
6CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e
7CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e
Jernej Skrabec6a6fe862023-04-10 10:21:13 +0200[diff] [blame]8CONFIG_DRAM_SUN50I_H616_TPR10=0xf83438
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]9CONFIG_MACH_SUN50I_H616=y
Mikhail Kalashnikov001d2f52023-06-07 01:07:44 +0100[diff] [blame]10CONFIG_SUNXI_DRAM_H616_DDR3_1333=y
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]11CONFIG_R_I2C_ENABLE=y
Andre Przywara51da6fe2021-07-04 22:15:01 +0100[diff] [blame]12CONFIG_SPL_SPI_SUNXI=y
Jernej Skrabece4e040c2021-01-11 21:11:53 +0100[diff] [blame]13# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]14CONFIG_SPL_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]15CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rini8825ec42021-08-17 17:59:47 -0400[diff] [blame]16CONFIG_SYS_I2C_MVTWSI=y
Tom Rinia6e29232021-08-18 23:12:32 -0400[diff] [blame]17CONFIG_SYS_I2C_SLAVE=0x7f
18CONFIG_SYS_I2C_SPEED=400000
Andre Przywara87afc082022-01-11 12:46:06 +0000[diff] [blame]19CONFIG_SPI_FLASH_MACRONIX=y
Andre Przywara2e8edff2021-01-23 12:46:43 +0000[diff] [blame]20CONFIG_PHY_REALTEK=y
21CONFIG_SUN8I_EMAC=y
Andre Przywara87afc082022-01-11 12:46:06 +0000[diff] [blame]22CONFIG_SPI=y
Andre Przywarad7796222023-06-12 00:32:41 +0100[diff] [blame]23CONFIG_USB_EHCI_HCD=y
24CONFIG_USB_OHCI_HCD=y
25CONFIG_USB_MUSB_GADGET=y