Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 2 | /* |
| 3 | * Configuation settings for the Renesas Technology RSK 7203 |
| 4 | * |
| 5 | * Copyright (C) 2008 Nobuhiro Iwamatsu |
| 6 | * Copyright (C) 2008 Renesas Solutions Corp. |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __RSK7203_H |
| 10 | #define __RSK7203_H |
| 11 | |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 12 | #define CONFIG_CPU_SH7203 1 |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 13 | |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 14 | #define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */ |
| 15 | |
Vladimir Zapolskiy | 5e72b84 | 2016-11-28 00:15:30 +0200 | [diff] [blame] | 16 | #define CONFIG_DISPLAY_BOARDINFO |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 17 | #undef CONFIG_SHOW_BOOT_PROGRESS |
| 18 | |
| 19 | /* MEMORY */ |
| 20 | #define RSK7203_SDRAM_BASE 0x0C000000 |
| 21 | #define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */ |
| 22 | #define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024) |
| 23 | |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 24 | /* List of legal baudrate settings for this board */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 25 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 26 | |
| 27 | /* SCIF */ |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 28 | #define CONFIG_CONS_SCIF0 1 |
| 29 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 30 | #define CONFIG_SYS_MEMTEST_START RSK7203_SDRAM_BASE |
| 31 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024)) |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 32 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 33 | #define CONFIG_SYS_SDRAM_BASE RSK7203_SDRAM_BASE |
| 34 | #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 35 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 36 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024) |
| 37 | #define CONFIG_SYS_MONITOR_BASE RSK7203_FLASH_BASE_1 |
| 38 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) |
| 39 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 40 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 41 | |
| 42 | /* FLASH */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 43 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
| 44 | #undef CONFIG_SYS_FLASH_QUIET_TEST |
| 45 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
| 46 | #define CONFIG_SYS_FLASH_BASE RSK7203_FLASH_BASE_1 |
| 47 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } |
| 48 | #define CONFIG_SYS_MAX_FLASH_SECT 64 |
| 49 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 50 | |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 51 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) |
| 52 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 53 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
| 54 | #define CONFIG_SYS_FLASH_ERASE_TOUT 12000 |
| 55 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 56 | |
| 57 | /* Board Clock */ |
| 58 | #define CONFIG_SYS_CLK_FREQ 33333333 |
Nobuhiro Iwamatsu | e698449 | 2013-08-21 16:11:21 +0900 | [diff] [blame] | 59 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 60 | #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ |
Nobuhiro Iwamatsu | befb5cc | 2014-01-08 14:57:30 +0900 | [diff] [blame] | 61 | #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 62 | |
Nobuhiro Iwamatsu | 6f7d436 | 2008-08-31 23:02:04 +0900 | [diff] [blame] | 63 | #endif /* __RSK7203_H */ |