| Andre Przywara | 6a92e85 | 2023-10-18 01:06:52 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SUNXI=y |
| Andre Przywara | c0fb340 | 2024-08-08 00:08:45 +0100 | [diff] [blame] | 3 | CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-h618-orangepi-zero3" |
| Andre Przywara | 6a92e85 | 2023-10-18 01:06:52 +0100 | [diff] [blame] | 4 | CONFIG_SPL=y |
| 5 | CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707 |
| 6 | CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e |
| 7 | CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e |
| 8 | CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee |
| 9 | CONFIG_DRAM_SUN50I_H616_TPR6=0x44000000 |
| 10 | CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6663 |
| 11 | CONFIG_DRAM_SUN50I_H616_TPR11=0x24242624 |
| 12 | CONFIG_DRAM_SUN50I_H616_TPR12=0x0f0f100f |
| 13 | CONFIG_MACH_SUN50I_H616=y |
| 14 | CONFIG_SUNXI_DRAM_H616_LPDDR4=y |
| 15 | CONFIG_DRAM_CLK=792 |
| 16 | CONFIG_USB1_VBUS_PIN="PC16" |
| 17 | CONFIG_R_I2C_ENABLE=y |
| 18 | CONFIG_SPL_SPI_SUNXI=y |
| 19 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| 20 | CONFIG_SPL_I2C=y |
| 21 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| 22 | CONFIG_SYS_I2C_MVTWSI=y |
| 23 | CONFIG_SYS_I2C_SLAVE=0x7f |
| 24 | CONFIG_SYS_I2C_SPEED=400000 |
| Tom Rini | ddb1ec1 | 2024-01-10 13:46:10 -0500 | [diff] [blame] | 25 | CONFIG_MTD=y |
| Andre Przywara | 6a92e85 | 2023-10-18 01:06:52 +0100 | [diff] [blame] | 26 | CONFIG_SPI_FLASH_ZBIT=y |
| 27 | CONFIG_PHY_MOTORCOMM=y |
| 28 | CONFIG_SUN8I_EMAC=y |
| 29 | CONFIG_AXP313_POWER=y |
| 30 | CONFIG_SPI=y |
| 31 | CONFIG_USB_EHCI_HCD=y |
| 32 | CONFIG_USB_OHCI_HCD=y |
| 33 | CONFIG_USB_MUSB_GADGET=y |