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git01.mediatek.com / filogic / uboot / 32ef937d806dfa48a03e47f4169ed14ad4e56539 / . / configs / msc_sm2s_imx8mp_defconfig
blob: def90d470b1dc40bff67cdaa4c960c8a51d3d65c [file] [log] [blame]
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_IMX8M=y
3CONFIG_TEXT_BASE=0x40200000
4CONFIG_SYS_MALLOC_LEN=0x2000000
5CONFIG_SPL_GPIO=y
6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Fabio Estevamcb81ccd2024-02-13 08:43:41 -0300[diff] [blame]8CONFIG_ENV_SIZE=0x4000
9CONFIG_ENV_OFFSET=0x200000
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]10CONFIG_DM_GPIO=y
11CONFIG_DEFAULT_DEVICE_TREE="imx8mp-msc-sm2s"
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]12CONFIG_TARGET_MSC_SM2S_IMX8MP=y
Tom Rini3d2b97c2023-05-29 10:43:26 -0400[diff] [blame]13CONFIG_SYS_MONITOR_LEN=524288
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]14CONFIG_SPL_MMC=y
15CONFIG_SPL_SERIAL=y
16CONFIG_SPL_DRIVERS_MISC=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]17CONFIG_SPL_STACK=0x960000
Tom Rini27280b62024-11-12 13:45:12 -0600[diff] [blame]18CONFIG_SPL_TEXT_BASE=0x920000
Tom Rinib9dc6842024-04-22 17:24:09 -0600[diff] [blame]19CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
20CONFIG_SPL_BSS_START_ADDR=0x0098FC00
21CONFIG_SPL_BSS_MAX_SIZE=0x400
Tom Rinic427a582024-10-08 09:18:32 -0600[diff] [blame]22CONFIG_SYS_BOOTM_LEN=0x2000000
23CONFIG_SYS_LOAD_ADDR=0x40480000
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]24CONFIG_SPL=y
Fabio Estevamcb81ccd2024-02-13 08:43:41 -0300[diff] [blame]25CONFIG_ENV_OFFSET_REDUND=0x204000
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]26CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]27CONFIG_SYS_BOOT_GET_CMDLINE=y
28CONFIG_SYS_BARGSIZE=2048
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]29CONFIG_FIT=y
30CONFIG_FIT_EXTERNAL_OFFSET=0x3000
31CONFIG_SPL_LOAD_FIT=y
Tom Riniadb7a192023-03-27 13:39:17 -0400[diff] [blame]32CONFIG_DISTRO_DEFAULTS=y
Tom Rini8d3a5882023-10-02 13:58:20 -0400[diff] [blame]33CONFIG_OF_SYSTEM_SETUP=y
Fabio Estevambfc34282024-02-13 08:43:42 -0300[diff] [blame]34CONFIG_DEFAULT_FDT_FILE="imx8mp-msc-sm2s-ep1.dtb"
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]35CONFIG_SYS_CBSIZE=2048
36CONFIG_SYS_PBSIZE=2074
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]37CONFIG_SPL_MAX_SIZE=0x26000
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]38CONFIG_SPL_BOARD_INIT=y
39CONFIG_SPL_BOOTROM_SUPPORT=y
40CONFIG_SPL_SYS_MALLOC_SIMPLE=y
41# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Simon Glass67e3fca2023-09-26 08:14:16 -0600[diff] [blame]42CONFIG_SPL_SYS_MALLOC=y
43CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
44CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000
45CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
Simon Glass18422832024-08-22 07:55:00 -0600[diff] [blame]46CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]47CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
48CONFIG_SPL_I2C=y
49CONFIG_SPL_POWER=y
50CONFIG_SPL_WATCHDOG=y
Tom Rinic4359852023-10-02 10:35:27 -0400[diff] [blame]51CONFIG_SYS_PROMPT="u-boot=> "
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]52# CONFIG_CMD_EXPORTENV is not set
53# CONFIG_CMD_IMPORTENV is not set
54# CONFIG_CMD_CRC32 is not set
55CONFIG_CMD_CLK=y
56CONFIG_CMD_FUSE=y
57CONFIG_CMD_GPIO=y
58CONFIG_CMD_I2C=y
59CONFIG_CMD_MMC=y
60CONFIG_CMD_CACHE=y
61CONFIG_CMD_REGULATOR=y
62CONFIG_CMD_EXT4_WRITE=y
63CONFIG_OF_CONTROL=y
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]64CONFIG_SPL_OF_CONTROL=y
65CONFIG_ENV_OVERWRITE=y
Fabio Estevamcb81ccd2024-02-13 08:43:41 -0300[diff] [blame]66CONFIG_ENV_IS_IN_MMC=y
67CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]68CONFIG_SYS_RELOC_GD_ENV_ADDR=y
69CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
70CONFIG_USE_ETHPRIME=y
71CONFIG_ETHPRIME="eth1"
72CONFIG_SPL_DM=y
73CONFIG_SPL_CLK_COMPOSITE_CCF=y
74CONFIG_CLK_COMPOSITE_CCF=y
75CONFIG_SPL_CLK_IMX8MP=y
76CONFIG_CLK_IMX8MP=y
77CONFIG_MXC_GPIO=y
Fabio Estevamde5d32f2024-02-13 08:43:39 -0300[diff] [blame]78CONFIG_DM_PCA953X=y
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]79CONFIG_DM_I2C=y
80CONFIG_LED=y
81CONFIG_LED_GPIO=y
82CONFIG_SUPPORT_EMMC_BOOT=y
83CONFIG_MMC_IO_VOLTAGE=y
84CONFIG_MMC_UHS_SUPPORT=y
85CONFIG_MMC_HS400_ES_SUPPORT=y
86CONFIG_MMC_HS400_SUPPORT=y
87CONFIG_FSL_USDHC=y
Marek Vasute4d70fd2024-05-31 18:47:17 +0200[diff] [blame]88CONFIG_PHY_ANEG_TIMEOUT=20000
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]89CONFIG_PHY_TI=y
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]90CONFIG_DM_ETH_PHY=y
91CONFIG_PHY_GIGE=y
92CONFIG_DWC_ETH_QOS=y
93CONFIG_DWC_ETH_QOS_IMX=y
94CONFIG_FEC_MXC=y
95CONFIG_MII=y
96CONFIG_PINCTRL=y
97CONFIG_SPL_PINCTRL=y
98CONFIG_PINCTRL_IMX8M=y
99CONFIG_DM_PMIC=y
100CONFIG_PMIC_RN5T567=y
101CONFIG_SPL_PMIC_RN5T567=y
102CONFIG_DM_REGULATOR=y
103CONFIG_DM_REGULATOR_FIXED=y
104CONFIG_DM_REGULATOR_GPIO=y
Fabio Estevam6184d132024-02-13 08:43:38 -0300[diff] [blame]105CONFIG_DM_SERIAL=y
Martyn Welch56f96e62022-10-25 10:55:02 +0100[diff] [blame]106CONFIG_MXC_UART=y
107CONFIG_SYSRESET=y
108CONFIG_SPL_SYSRESET=y
109CONFIG_SYSRESET_PSCI=y