Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 32ef937d806dfa48a03e47f4169ed14ad4e56539 / . / configs / jetson-tk1_defconfig
blob: b92590eb5fdb704c29d0fcc3652141b53bfef666 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
Tom Rini295ab162022-10-28 20:27:10 -0400[diff] [blame]2CONFIG_SYS_HAS_NONCACHED_MEMORY=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]3CONFIG_SYS_L2CACHE_OFF=y
Trevor Woerner513f6402020-05-06 08:02:41 -0400[diff] [blame]4CONFIG_ARCH_TEGRA=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]5CONFIG_TEXT_BASE=0x80110000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]6CONFIG_SYS_MALLOC_LEN=0x2500000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=2
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]8CONFIG_SF_DEFAULT_SPEED=24000000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]9CONFIG_ENV_SIZE=0x2000
10CONFIG_ENV_OFFSET=0xFFFFE000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1"
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]12CONFIG_SPL_STACK=0x800ffffc
Tom Rini27280b62024-11-12 13:45:12 -0600[diff] [blame]13CONFIG_SPL_TEXT_BASE=0x80108000
Tom Rinic427a582024-10-08 09:18:32 -0600[diff] [blame]14CONFIG_SYS_LOAD_ADDR=0x81000000
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]15CONFIG_TEGRA124=y
16CONFIG_TARGET_JETSON_TK1=y
Tom Rini4b3e7c02022-12-02 16:42:45 -0500[diff] [blame]17CONFIG_TEGRA_ENABLE_UARTD=y
Tom Rini4dbaf6f2022-06-08 08:24:33 -0400[diff] [blame]18CONFIG_TEGRA_GPU=y
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]19CONFIG_PCI=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]20CONFIG_OF_SYSTEM_SETUP=y
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]21CONFIG_SYS_PBSIZE=2089
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]22CONFIG_CONSOLE_MUX=y
Simon Glass3110ece2016-10-17 20:13:02 -0600[diff] [blame]23CONFIG_SYS_STDIO_DEREGISTER=y
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]24CONFIG_SPL_FOOTPRINT_LIMIT=y
25CONFIG_SPL_MAX_FOOTPRINT=0x8000
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]26# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Simon Glass67e3fca2023-09-26 08:14:16 -0600[diff] [blame]27CONFIG_SPL_SYS_MALLOC=y
28CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
29CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80090000
30CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
Tom Rinic4359852023-10-02 10:35:27 -0400[diff] [blame]31CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # "
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]32# CONFIG_CMD_IMI is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]33CONFIG_CMD_DFU=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]34CONFIG_CMD_GPIO=y
35CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]36CONFIG_CMD_MMC=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]37CONFIG_CMD_PCI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]38CONFIG_CMD_SPI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]39CONFIG_CMD_USB=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]40CONFIG_CMD_USB_MASS_STORAGE=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]41# CONFIG_CMD_SETEXPR is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]42CONFIG_CMD_EXT4_WRITE=y
Patrick Delaunayf7e07722017-01-27 11:00:37 +0100[diff] [blame]43# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]44# CONFIG_SPL_EFI_PARTITION is not set
Simon Glass57d13382017-07-25 08:30:14 -0600[diff] [blame]45CONFIG_OF_LIVE=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]46CONFIG_ENV_OVERWRITE=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]47CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinieb1f9092020-07-24 17:14:47 -0400[diff] [blame]48CONFIG_SYS_MMC_ENV_PART=2
Tom Rini265c7da2016-09-19 13:31:30 -0400[diff] [blame]49CONFIG_DFU_MMC=y
50CONFIG_DFU_RAM=y
51CONFIG_DFU_SF=y
Aswath Govindrajucc13c5d2021-06-01 16:51:47 +0530[diff] [blame]52CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
53CONFIG_SYS_DFU_MAX_FILE_SIZE=0x2000000
Tom Rini41b6dc92019-02-22 10:17:41 -0500[diff] [blame]54CONFIG_SYS_I2C_TEGRA=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]55CONFIG_SPI_FLASH_WINBOND=y
Bin Meng29971222016-03-21 06:47:42 -0700[diff] [blame]56CONFIG_RTL8169=y
Simon Glassc78e3272015-11-19 20:26:55 -0700[diff] [blame]57CONFIG_PCI_TEGRA=y
Simon Glassb3d2ed32017-07-25 08:30:12 -0600[diff] [blame]58CONFIG_DM_PMIC=y
Simon Glass52222b12017-04-26 22:27:46 -0600[diff] [blame]59CONFIG_PMIC_AS3722=y
Simon Glassb3d2ed32017-07-25 08:30:12 -0600[diff] [blame]60CONFIG_DM_REGULATOR=y
61CONFIG_REGULATOR_AS3722=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]62CONFIG_SYS_NS16550=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]63CONFIG_TEGRA114_SPI=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]64CONFIG_USB=y
Tom Rini7716cd62017-05-12 22:33:28 -0400[diff] [blame]65CONFIG_USB_EHCI_HCD=y
Peter Robinson43ecef42019-02-20 12:17:27 +0000[diff] [blame]66CONFIG_USB_EHCI_TEGRA=y
Tom Rini2c082ab2021-07-26 21:10:37 -0400[diff] [blame]67CONFIG_USB_HOST_ETHER=y
68CONFIG_USB_ETHER_ASIX=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]69CONFIG_USB_GADGET=y
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]70CONFIG_CI_UDC=y
Sam Protsenko4d2439d2016-04-13 14:20:26 +0300[diff] [blame]71CONFIG_USB_GADGET_DOWNLOAD=y