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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Vadim Bendeburydac69642011-10-17 08:36:14 +00002/*
Che-liang Chiouc18f9012013-02-28 09:34:57 +00003 * Copyright (c) 2013 The Chromium OS Authors.
Reinhard Pfau4fece432013-06-26 15:55:13 +02004 * Coypright (c) 2013 Guntermann & Drunck GmbH
Vadim Bendeburydac69642011-10-17 08:36:14 +00005 */
6
Miquel Raynal4c6759e2018-05-15 11:57:06 +02007#ifndef __TPM_V1_H
8#define __TPM_V1_H
Vadim Bendeburydac69642011-10-17 08:36:14 +00009
Miquel Raynal4c6759e2018-05-15 11:57:06 +020010#include <tpm-common.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060011#include <linux/bitops.h>
Simon Glass6c7a2322015-08-22 18:31:31 -060012
Miquel Raynal4c6759e2018-05-15 11:57:06 +020013/* Useful constants */
14enum {
15 TPM_REQUEST_HEADER_LENGTH = 10,
16 TPM_RESPONSE_HEADER_LENGTH = 10,
17 PCR_DIGEST_LENGTH = 20,
18 DIGEST_LENGTH = 20,
19 TPM_REQUEST_AUTH_LENGTH = 45,
20 TPM_RESPONSE_AUTH_LENGTH = 41,
21 /* some max lengths, valid for RSA keys <= 2048 bits */
22 TPM_KEY12_MAX_LENGTH = 618,
23 TPM_PUBKEY_MAX_LENGTH = 288,
Simon Glass6c7a2322015-08-22 18:31:31 -060024};
25
Che-liang Chiouc18f9012013-02-28 09:34:57 +000026enum tpm_startup_type {
27 TPM_ST_CLEAR = 0x0001,
28 TPM_ST_STATE = 0x0002,
29 TPM_ST_DEACTIVATED = 0x0003,
30};
31
32enum tpm_physical_presence {
33 TPM_PHYSICAL_PRESENCE_HW_DISABLE = 0x0200,
34 TPM_PHYSICAL_PRESENCE_CMD_DISABLE = 0x0100,
35 TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK = 0x0080,
36 TPM_PHYSICAL_PRESENCE_HW_ENABLE = 0x0040,
37 TPM_PHYSICAL_PRESENCE_CMD_ENABLE = 0x0020,
38 TPM_PHYSICAL_PRESENCE_NOTPRESENT = 0x0010,
39 TPM_PHYSICAL_PRESENCE_PRESENT = 0x0008,
40 TPM_PHYSICAL_PRESENCE_LOCK = 0x0004,
41};
42
43enum tpm_nv_index {
44 TPM_NV_INDEX_LOCK = 0xffffffff,
45 TPM_NV_INDEX_0 = 0x00000000,
46 TPM_NV_INDEX_DIR = 0x10000001,
47};
48
Mario Six4eceb6c2017-01-11 16:00:50 +010049enum tpm_resource_type {
50 TPM_RT_KEY = 0x00000001,
51 TPM_RT_AUTH = 0x00000002,
52 TPM_RT_HASH = 0x00000003,
53 TPM_RT_TRANS = 0x00000004,
54 TPM_RT_CONTEXT = 0x00000005,
55 TPM_RT_COUNTER = 0x00000006,
56 TPM_RT_DELEGATE = 0x00000007,
57 TPM_RT_DAA_TPM = 0x00000008,
58 TPM_RT_DAA_V0 = 0x00000009,
59 TPM_RT_DAA_V1 = 0x0000000A,
60};
61
62enum tpm_capability_areas {
63 TPM_CAP_ORD = 0x00000001,
64 TPM_CAP_ALG = 0x00000002,
65 TPM_CAP_PID = 0x00000003,
66 TPM_CAP_FLAG = 0x00000004,
67 TPM_CAP_PROPERTY = 0x00000005,
68 TPM_CAP_VERSION = 0x00000006,
69 TPM_CAP_KEY_HANDLE = 0x00000007,
70 TPM_CAP_CHECK_LOADED = 0x00000008,
71 TPM_CAP_SYM_MODE = 0x00000009,
72 TPM_CAP_KEY_STATUS = 0x0000000C,
73 TPM_CAP_NV_LIST = 0x0000000D,
74 TPM_CAP_MFR = 0x00000010,
75 TPM_CAP_NV_INDEX = 0x00000011,
76 TPM_CAP_TRANS_ALG = 0x00000012,
77 TPM_CAP_HANDLE = 0x00000014,
78 TPM_CAP_TRANS_ES = 0x00000015,
79 TPM_CAP_AUTH_ENCRYPT = 0x00000017,
80 TPM_CAP_SELECT_SIZE = 0x00000018,
81 TPM_CAP_DA_LOGIC = 0x00000019,
82 TPM_CAP_VERSION_VAL = 0x0000001A,
83};
84
Simon Glass5ff3f162018-10-01 11:55:17 -060085enum tmp_cap_flag {
86 TPM_CAP_FLAG_PERMANENT = 0x108,
87};
88
89#define TPM_TAG_PERMANENT_FLAGS 0x001f
90
Miquel Raynal02c4bba2018-05-15 11:57:01 +020091#define TPM_NV_PER_GLOBALLOCK BIT(15)
92#define TPM_NV_PER_PPREAD BIT(16)
93#define TPM_NV_PER_PPWRITE BIT(0)
94#define TPM_NV_PER_READ_STCLEAR BIT(31)
95#define TPM_NV_PER_WRITE_STCLEAR BIT(14)
96#define TPM_NV_PER_WRITEDEFINE BIT(13)
97#define TPM_NV_PER_WRITEALL BIT(12)
Simon Glassff9f04a2015-08-22 18:31:41 -060098
99enum {
100 TPM_PUBEK_SIZE = 256,
101};
102
Simon Glass5ff3f162018-10-01 11:55:17 -0600103enum {
104 TPM_CMD_EXTEND = 0x14,
105 TPM_CMD_GET_CAPABILITY = 0x65,
106 TPM_CMD_NV_DEFINE_SPACE = 0xcc,
107 TPM_CMD_NV_WRITE_VALUE = 0xcd,
108 TPM_CMD_NV_READ_VALUE = 0xcf,
109};
110
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000111/**
Reinhard Pfau4fece432013-06-26 15:55:13 +0200112 * TPM return codes as defined in the TCG Main specification
113 * (TPM Main Part 2 Structures; Specification version 1.2)
114 */
115enum tpm_return_code {
116 TPM_BASE = 0x00000000,
117 TPM_NON_FATAL = 0x00000800,
118 TPM_SUCCESS = TPM_BASE,
119 /* TPM-defined fatal error codes */
120 TPM_AUTHFAIL = TPM_BASE + 1,
121 TPM_BADINDEX = TPM_BASE + 2,
122 TPM_BAD_PARAMETER = TPM_BASE + 3,
123 TPM_AUDITFAILURE = TPM_BASE + 4,
124 TPM_CLEAR_DISABLED = TPM_BASE + 5,
125 TPM_DEACTIVATED = TPM_BASE + 6,
126 TPM_DISABLED = TPM_BASE + 7,
127 TPM_DISABLED_CMD = TPM_BASE + 8,
128 TPM_FAIL = TPM_BASE + 9,
129 TPM_BAD_ORDINAL = TPM_BASE + 10,
130 TPM_INSTALL_DISABLED = TPM_BASE + 11,
131 TPM_INVALID_KEYHANDLE = TPM_BASE + 12,
132 TPM_KEYNOTFOUND = TPM_BASE + 13,
133 TPM_INAPPROPRIATE_ENC = TPM_BASE + 14,
134 TPM_MIGRATE_FAIL = TPM_BASE + 15,
135 TPM_INVALID_PCR_INFO = TPM_BASE + 16,
136 TPM_NOSPACE = TPM_BASE + 17,
137 TPM_NOSRK = TPM_BASE + 18,
138 TPM_NOTSEALED_BLOB = TPM_BASE + 19,
139 TPM_OWNER_SET = TPM_BASE + 20,
140 TPM_RESOURCES = TPM_BASE + 21,
141 TPM_SHORTRANDOM = TPM_BASE + 22,
142 TPM_SIZE = TPM_BASE + 23,
143 TPM_WRONGPCRVAL = TPM_BASE + 24,
144 TPM_BAD_PARAM_SIZE = TPM_BASE + 25,
145 TPM_SHA_THREAD = TPM_BASE + 26,
146 TPM_SHA_ERROR = TPM_BASE + 27,
147 TPM_FAILEDSELFTEST = TPM_BASE + 28,
148 TPM_AUTH2FAIL = TPM_BASE + 29,
149 TPM_BADTAG = TPM_BASE + 30,
150 TPM_IOERROR = TPM_BASE + 31,
151 TPM_ENCRYPT_ERROR = TPM_BASE + 32,
152 TPM_DECRYPT_ERROR = TPM_BASE + 33,
153 TPM_INVALID_AUTHHANDLE = TPM_BASE + 34,
154 TPM_NO_ENDORSEMENT = TPM_BASE + 35,
155 TPM_INVALID_KEYUSAGE = TPM_BASE + 36,
156 TPM_WRONG_ENTITYTYPE = TPM_BASE + 37,
157 TPM_INVALID_POSTINIT = TPM_BASE + 38,
158 TPM_INAPPROPRIATE_SIG = TPM_BASE + 39,
159 TPM_BAD_KEY_PROPERTY = TPM_BASE + 40,
160 TPM_BAD_MIGRATION = TPM_BASE + 41,
161 TPM_BAD_SCHEME = TPM_BASE + 42,
162 TPM_BAD_DATASIZE = TPM_BASE + 43,
163 TPM_BAD_MODE = TPM_BASE + 44,
164 TPM_BAD_PRESENCE = TPM_BASE + 45,
165 TPM_BAD_VERSION = TPM_BASE + 46,
166 TPM_NO_WRAP_TRANSPORT = TPM_BASE + 47,
167 TPM_AUDITFAIL_UNSUCCESSFUL = TPM_BASE + 48,
168 TPM_AUDITFAIL_SUCCESSFUL = TPM_BASE + 49,
169 TPM_NOTRESETABLE = TPM_BASE + 50,
170 TPM_NOTLOCAL = TPM_BASE + 51,
171 TPM_BAD_TYPE = TPM_BASE + 52,
172 TPM_INVALID_RESOURCE = TPM_BASE + 53,
173 TPM_NOTFIPS = TPM_BASE + 54,
174 TPM_INVALID_FAMILY = TPM_BASE + 55,
175 TPM_NO_NV_PERMISSION = TPM_BASE + 56,
176 TPM_REQUIRES_SIGN = TPM_BASE + 57,
177 TPM_KEY_NOTSUPPORTED = TPM_BASE + 58,
178 TPM_AUTH_CONFLICT = TPM_BASE + 59,
179 TPM_AREA_LOCKED = TPM_BASE + 60,
180 TPM_BAD_LOCALITY = TPM_BASE + 61,
181 TPM_READ_ONLY = TPM_BASE + 62,
182 TPM_PER_NOWRITE = TPM_BASE + 63,
183 TPM_FAMILY_COUNT = TPM_BASE + 64,
184 TPM_WRITE_LOCKED = TPM_BASE + 65,
185 TPM_BAD_ATTRIBUTES = TPM_BASE + 66,
186 TPM_INVALID_STRUCTURE = TPM_BASE + 67,
187 TPM_KEY_OWNER_CONTROL = TPM_BASE + 68,
188 TPM_BAD_COUNTER = TPM_BASE + 69,
189 TPM_NOT_FULLWRITE = TPM_BASE + 70,
190 TPM_CONTEXT_GAP = TPM_BASE + 71,
191 TPM_MAXNVWRITES = TPM_BASE + 72,
192 TPM_NOOPERATOR = TPM_BASE + 73,
193 TPM_RESOURCEMISSING = TPM_BASE + 74,
194 TPM_DELEGATE_LOCK = TPM_BASE + 75,
195 TPM_DELEGATE_FAMILY = TPM_BASE + 76,
196 TPM_DELEGATE_ADMIN = TPM_BASE + 77,
197 TPM_TRANSPORT_NOTEXCLUSIVE = TPM_BASE + 78,
198 TPM_OWNER_CONTROL = TPM_BASE + 79,
199 TPM_DAA_RESOURCES = TPM_BASE + 80,
200 TPM_DAA_INPUT_DATA0 = TPM_BASE + 81,
201 TPM_DAA_INPUT_DATA1 = TPM_BASE + 82,
202 TPM_DAA_ISSUER_SETTINGS = TPM_BASE + 83,
203 TPM_DAA_TPM_SETTINGS = TPM_BASE + 84,
204 TPM_DAA_STAGE = TPM_BASE + 85,
205 TPM_DAA_ISSUER_VALIDITY = TPM_BASE + 86,
206 TPM_DAA_WRONG_W = TPM_BASE + 87,
207 TPM_BAD_HANDLE = TPM_BASE + 88,
208 TPM_BAD_DELEGATE = TPM_BASE + 89,
209 TPM_BADCONTEXT = TPM_BASE + 90,
210 TPM_TOOMANYCONTEXTS = TPM_BASE + 91,
211 TPM_MA_TICKET_SIGNATURE = TPM_BASE + 92,
212 TPM_MA_DESTINATION = TPM_BASE + 93,
213 TPM_MA_SOURCE = TPM_BASE + 94,
214 TPM_MA_AUTHORITY = TPM_BASE + 95,
215 TPM_PERMANENTEK = TPM_BASE + 97,
216 TPM_BAD_SIGNATURE = TPM_BASE + 98,
217 TPM_NOCONTEXTSPACE = TPM_BASE + 99,
218 /* TPM-defined non-fatal errors */
219 TPM_RETRY = TPM_BASE + TPM_NON_FATAL,
220 TPM_NEEDS_SELFTEST = TPM_BASE + TPM_NON_FATAL + 1,
221 TPM_DOING_SELFTEST = TPM_BASE + TPM_NON_FATAL + 2,
222 TPM_DEFEND_LOCK_RUNNING = TPM_BASE + TPM_NON_FATAL + 3,
223};
224
Simon Glassff9f04a2015-08-22 18:31:41 -0600225struct tpm_permanent_flags {
226 __be16 tag;
227 u8 disable;
228 u8 ownership;
229 u8 deactivated;
230 u8 read_pubek;
231 u8 disable_owner_clear;
232 u8 allow_maintenance;
233 u8 physical_presence_lifetime_lock;
234 u8 physical_presence_hw_enable;
235 u8 physical_presence_cmd_enable;
236 u8 cekp_used;
237 u8 tpm_post;
238 u8 tpm_post_lock;
239 u8 fips;
240 u8 operator;
241 u8 enable_revoke_ek;
242 u8 nv_locked;
243 u8 read_srk_pub;
244 u8 tpm_established;
245 u8 maintenance_done;
246 u8 disable_full_da_logic_info;
247} __packed;
248
Simon Glassf99c3292018-10-01 11:55:18 -0600249#define TPM_SHA1_160_HASH_LEN 0x14
250
251struct __packed tpm_composite_hash {
252 u8 digest[TPM_SHA1_160_HASH_LEN];
253};
254
255struct __packed tpm_pcr_selection {
256 __be16 size_of_select;
257 u8 pcr_select[3]; /* matches vboot's struct */
258};
259
260struct __packed tpm_pcr_info_short {
261 struct tpm_pcr_selection pcr_selection;
262 u8 locality_at_release;
263 struct tpm_composite_hash digest_at_release;
264};
265
266struct __packed tpm_nv_attributes {
267 __be16 tag;
268 __be32 attributes;
269};
270
271struct __packed tpm_nv_data_public {
272 __be16 tag;
273 __be32 nv_index;
274 struct tpm_pcr_info_short pcr_info_read;
275 struct tpm_pcr_info_short pcr_info_write;
276 struct tpm_nv_attributes permission;
277 u8 read_st_clear;
278 u8 write_st_clear;
279 u8 write_define;
280 __be32 data_size;
281};
282
Simon Glass6c7a2322015-08-22 18:31:31 -0600283/**
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000284 * Issue a TPM_Startup command.
Vadim Bendeburydac69642011-10-17 08:36:14 +0000285 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700286 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000287 * @param mode TPM startup mode
288 * @return return code of the operation
289 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700290u32 tpm_startup(struct udevice *dev, enum tpm_startup_type mode);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000291
292/**
293 * Issue a TPM_SelfTestFull command.
Vadim Bendeburydac69642011-10-17 08:36:14 +0000294 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700295 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000296 * @return return code of the operation
Vadim Bendeburydac69642011-10-17 08:36:14 +0000297 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700298u32 tpm_self_test_full(struct udevice *dev);
Vadim Bendeburydac69642011-10-17 08:36:14 +0000299
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000300/**
301 * Issue a TPM_ContinueSelfTest command.
Vadim Bendeburydac69642011-10-17 08:36:14 +0000302 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700303 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000304 * @return return code of the operation
Vadim Bendeburydac69642011-10-17 08:36:14 +0000305 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700306u32 tpm_continue_self_test(struct udevice *dev);
Vadim Bendeburydac69642011-10-17 08:36:14 +0000307
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000308/**
309 * Issue a TPM_NV_DefineSpace command. The implementation is limited
310 * to specify TPM_NV_ATTRIBUTES and size of the area. The area index
311 * could be one of the special value listed in enum tpm_nv_index.
Vadim Bendeburydac69642011-10-17 08:36:14 +0000312 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700313 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000314 * @param index index of the area
315 * @param perm TPM_NV_ATTRIBUTES of the area
316 * @param size size of the area
317 * @return return code of the operation
318 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700319u32 tpm_nv_define_space(struct udevice *dev, u32 index, u32 perm, u32 size);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000320
321/**
322 * Issue a TPM_NV_ReadValue command. This implementation is limited
323 * to read the area from offset 0. The area index could be one of
324 * the special value listed in enum tpm_nv_index.
325 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700326 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000327 * @param index index of the area
328 * @param data output buffer of the area contents
329 * @param count size of output buffer
330 * @return return code of the operation
331 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700332u32 tpm_nv_read_value(struct udevice *dev, u32 index, void *data, u32 count);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000333
334/**
335 * Issue a TPM_NV_WriteValue command. This implementation is limited
336 * to write the area from offset 0. The area index could be one of
337 * the special value listed in enum tpm_nv_index.
338 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700339 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000340 * @param index index of the area
341 * @param data input buffer to be wrote to the area
342 * @param length length of data bytes of input buffer
343 * @return return code of the operation
344 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700345u32 tpm_nv_write_value(struct udevice *dev, u32 index, const void *data,
346 u32 length);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000347
348/**
349 * Issue a TPM_Extend command.
350 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700351 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000352 * @param index index of the PCR
353 * @param in_digest 160-bit value representing the event to be
354 * recorded
355 * @param out_digest 160-bit PCR value after execution of the
356 * command
357 * @return return code of the operation
358 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700359u32 tpm_extend(struct udevice *dev, u32 index, const void *in_digest,
360 void *out_digest);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000361
362/**
363 * Issue a TPM_PCRRead command.
Vadim Bendeburydac69642011-10-17 08:36:14 +0000364 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700365 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000366 * @param index index of the PCR
367 * @param data output buffer for contents of the named PCR
368 * @param count size of output buffer
369 * @return return code of the operation
370 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700371u32 tpm_pcr_read(struct udevice *dev, u32 index, void *data, size_t count);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000372
373/**
374 * Issue a TSC_PhysicalPresence command. TPM physical presence flag
375 * is bit-wise OR'ed of flags listed in enum tpm_physical_presence.
376 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700377 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000378 * @param presence TPM physical presence flag
379 * @return return code of the operation
380 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700381u32 tpm_tsc_physical_presence(struct udevice *dev, u16 presence);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000382
383/**
384 * Issue a TPM_ReadPubek command.
385 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700386 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000387 * @param data output buffer for the public endorsement key
Miquel Raynala59aa342018-05-15 11:57:02 +0200388 * @param count size of output buffer
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000389 * @return return code of the operation
390 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700391u32 tpm_read_pubek(struct udevice *dev, void *data, size_t count);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000392
393/**
394 * Issue a TPM_ForceClear command.
395 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700396 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000397 * @return return code of the operation
398 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700399u32 tpm_force_clear(struct udevice *dev);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000400
401/**
402 * Issue a TPM_PhysicalEnable command.
403 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700404 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000405 * @return return code of the operation
406 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700407u32 tpm_physical_enable(struct udevice *dev);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000408
409/**
410 * Issue a TPM_PhysicalDisable command.
411 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700412 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000413 * @return return code of the operation
414 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700415u32 tpm_physical_disable(struct udevice *dev);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000416
417/**
418 * Issue a TPM_PhysicalSetDeactivated command.
419 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700420 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000421 * @param state boolean state of the deactivated flag
422 * @return return code of the operation
423 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700424u32 tpm_physical_set_deactivated(struct udevice *dev, u8 state);
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000425
426/**
427 * Issue a TPM_GetCapability command. This implementation is limited
428 * to query sub_cap index that is 4-byte wide.
Vadim Bendeburydac69642011-10-17 08:36:14 +0000429 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700430 * @param dev TPM device
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000431 * @param cap_area partition of capabilities
432 * @param sub_cap further definition of capability, which is
433 * limited to be 4-byte wide
434 * @param cap output buffer for capability information
Miquel Raynala59aa342018-05-15 11:57:02 +0200435 * @param count size of output buffer
Che-liang Chiouc18f9012013-02-28 09:34:57 +0000436 * @return return code of the operation
Vadim Bendeburydac69642011-10-17 08:36:14 +0000437 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700438u32 tpm_get_capability(struct udevice *dev, u32 cap_area, u32 sub_cap,
439 void *cap, size_t count);
Vadim Bendeburydac69642011-10-17 08:36:14 +0000440
Reinhard Pfau4fece432013-06-26 15:55:13 +0200441/**
Miquel Raynala59aa342018-05-15 11:57:02 +0200442 * Issue a TPM_FlushSpecific command for a AUTH resource.
Reinhard Pfau4fece432013-06-26 15:55:13 +0200443 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700444 * @param dev TPM device
Reinhard Pfau4fece432013-06-26 15:55:13 +0200445 * @param auth_handle handle of the auth session
446 * @return return code of the operation
447 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700448u32 tpm_terminate_auth_session(struct udevice *dev, u32 auth_handle);
Reinhard Pfau4fece432013-06-26 15:55:13 +0200449
450/**
Miquel Raynala59aa342018-05-15 11:57:02 +0200451 * Issue a TPM_OIAP command to setup an object independent authorization
Reinhard Pfau4fece432013-06-26 15:55:13 +0200452 * session.
453 * Information about the session is stored internally.
454 * If there was already an OIAP session active it is terminated and a new
455 * session is set up.
456 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700457 * @param dev TPM device
Reinhard Pfau4fece432013-06-26 15:55:13 +0200458 * @param auth_handle pointer to the (new) auth handle or NULL.
459 * @return return code of the operation
460 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700461u32 tpm_oiap(struct udevice *dev, u32 *auth_handle);
Reinhard Pfau4fece432013-06-26 15:55:13 +0200462
463/**
464 * Ends an active OIAP session.
465 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700466 * @param dev TPM device
Reinhard Pfau4fece432013-06-26 15:55:13 +0200467 * @return return code of the operation
468 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700469u32 tpm_end_oiap(struct udevice *dev);
Reinhard Pfau4fece432013-06-26 15:55:13 +0200470
471/**
472 * Issue a TPM_LoadKey2 (Auth1) command using an OIAP session for authenticating
473 * the usage of the parent key.
474 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700475 * @param dev TPM device
Reinhard Pfau4fece432013-06-26 15:55:13 +0200476 * @param parent_handle handle of the parent key.
477 * @param key pointer to the key structure (TPM_KEY or TPM_KEY12).
478 * @param key_length size of the key structure
479 * @param parent_key_usage_auth usage auth for the parent key
480 * @param key_handle pointer to the key handle
481 * @return return code of the operation
482 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700483u32 tpm_load_key2_oiap(struct udevice *dev, u32 parent_handle, const void *key,
484 size_t key_length, const void *parent_key_usage_auth,
485 u32 *key_handle);
Reinhard Pfau4fece432013-06-26 15:55:13 +0200486
487/**
488 * Issue a TPM_GetPubKey (Auth1) command using an OIAP session for
489 * authenticating the usage of the key.
490 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700491 * @param dev TPM device
Reinhard Pfau4fece432013-06-26 15:55:13 +0200492 * @param key_handle handle of the key
493 * @param usage_auth usage auth for the key
494 * @param pubkey pointer to the pub key buffer; may be NULL if the pubkey
495 * should not be stored.
496 * @param pubkey_len pointer to the pub key buffer len. On entry: the size of
497 * the provided pubkey buffer. On successful exit: the size
498 * of the stored TPM_PUBKEY structure (iff pubkey != NULL).
499 * @return return code of the operation
500 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700501u32 tpm_get_pub_key_oiap(struct udevice *dev, u32 key_handle,
502 const void *usage_auth, void *pubkey,
Miquel Raynald790f552018-05-15 11:56:59 +0200503 size_t *pubkey_len);
Reinhard Pfau4fece432013-06-26 15:55:13 +0200504
Simon Glassff9f04a2015-08-22 18:31:41 -0600505/**
506 * Get the TPM permanent flags value
507 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700508 * @param dev TPM device
Simon Glassff9f04a2015-08-22 18:31:41 -0600509 * @param pflags Place to put permanent flags
510 * @return return code of the operation
511 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700512u32 tpm_get_permanent_flags(struct udevice *dev,
513 struct tpm_permanent_flags *pflags);
Simon Glassff9f04a2015-08-22 18:31:41 -0600514
515/**
516 * Get the TPM permissions
517 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700518 * @param dev TPM device
Simon Glassff9f04a2015-08-22 18:31:41 -0600519 * @param perm Returns permissions value
520 * @return return code of the operation
521 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700522u32 tpm_get_permissions(struct udevice *dev, u32 index, u32 *perm);
Simon Glassff9f04a2015-08-22 18:31:41 -0600523
Mario Six4eceb6c2017-01-11 16:00:50 +0100524/**
525 * Flush a resource with a given handle and type from the TPM
526 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700527 * @param dev TPM device
Mario Six4eceb6c2017-01-11 16:00:50 +0100528 * @param key_handle handle of the resource
529 * @param resource_type type of the resource
530 * @return return code of the operation
531 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700532u32 tpm_flush_specific(struct udevice *dev, u32 key_handle, u32 resource_type);
Mario Six4eceb6c2017-01-11 16:00:50 +0100533
mario.six@gdsys.cca5a7ea22017-03-20 10:28:28 +0100534#ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1
535/**
536 * Search for a key by usage AuthData and the hash of the parent's pub key.
537 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700538 * @param dev TPM device
mario.six@gdsys.cca5a7ea22017-03-20 10:28:28 +0100539 * @param auth Usage auth of the key to search for
540 * @param pubkey_digest SHA1 hash of the pub key structure of the key
541 * @param[out] handle The handle of the key (Non-null iff found)
542 * @return 0 if key was found in TPM; != 0 if not.
543 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700544u32 tpm_find_key_sha1(struct udevice *dev, const u8 auth[20],
545 const u8 pubkey_digest[20], u32 *handle);
mario.six@gdsys.cca5a7ea22017-03-20 10:28:28 +0100546#endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */
André Draszik2c6e5ff2017-10-03 16:55:52 +0100547
548/**
549 * Read random bytes from the TPM RNG. The implementation deals with the fact
550 * that the TPM may legally return fewer bytes than requested by retrying
551 * until @p count bytes have been received.
552 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700553 * @param dev TPM device
André Draszik2c6e5ff2017-10-03 16:55:52 +0100554 * @param data output buffer for the random bytes
555 * @param count size of output buffer
556 * @return return code of the operation
557 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700558u32 tpm_get_random(struct udevice *dev, void *data, u32 count);
André Draszik2c6e5ff2017-10-03 16:55:52 +0100559
Simon Glassbccabbe2018-10-01 12:22:29 -0600560/**
561 * tpm_finalise_physical_presence() - Finalise physical presence
562 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700563 * @param dev TPM device
Simon Glassbccabbe2018-10-01 12:22:29 -0600564 * @return return code of the operation (0 = success)
565 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700566u32 tpm_finalise_physical_presence(struct udevice *dev);
Simon Glassbccabbe2018-10-01 12:22:29 -0600567
568/**
569 * tpm_nv_set_locked() - lock the non-volatile space
570 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700571 * @param dev TPM device
Simon Glassbccabbe2018-10-01 12:22:29 -0600572 * @return return code of the operation (0 = success)
573 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700574u32 tpm_nv_set_locked(struct udevice *dev);
Simon Glassbccabbe2018-10-01 12:22:29 -0600575
576/**
577 * tpm_set_global_lock() - set the global lock
578 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700579 * @param dev TPM device
Simon Glassbccabbe2018-10-01 12:22:29 -0600580 * @return return code of the operation (0 = success)
581 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700582u32 tpm_set_global_lock(struct udevice *dev);
Simon Glassbccabbe2018-10-01 12:22:29 -0600583
584/**
585 * tpm_resume() - start up the TPM from resume (after suspend)
586 *
Simon Glass8ceca1d2018-11-18 14:22:27 -0700587 * @param dev TPM device
Simon Glassbccabbe2018-10-01 12:22:29 -0600588 * @return return code of the operation (0 = success)
589 */
Simon Glass8ceca1d2018-11-18 14:22:27 -0700590u32 tpm_resume(struct udevice *dev);
Simon Glassbccabbe2018-10-01 12:22:29 -0600591
Miquel Raynal4c6759e2018-05-15 11:57:06 +0200592#endif /* __TPM_V1_H */