| Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Device Tree Source for J7200 SoC Family MCU/WAKEUP Domain peripherals |
| 4 | * |
| 5 | * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ |
| 6 | */ |
| 7 | |
| 8 | &cbass_mcu_wakeup { |
| 9 | dmsc: dmsc@44083000 { |
| 10 | compatible = "ti,k2g-sci"; |
| 11 | ti,host-id = <12>; |
| 12 | |
| 13 | mbox-names = "rx", "tx"; |
| 14 | |
| 15 | mboxes= <&secure_proxy_main 11>, |
| 16 | <&secure_proxy_main 13>; |
| 17 | |
| 18 | reg-names = "debug_messages"; |
| 19 | reg = <0x00 0x44083000 0x0 0x1000>; |
| 20 | |
| 21 | k3_pds: power-controller { |
| 22 | compatible = "ti,sci-pm-domain"; |
| 23 | #power-domain-cells = <2>; |
| 24 | }; |
| 25 | |
| 26 | k3_clks: clocks { |
| 27 | compatible = "ti,k2g-sci-clk"; |
| 28 | #clock-cells = <2>; |
| 29 | }; |
| 30 | |
| 31 | k3_reset: reset-controller { |
| 32 | compatible = "ti,sci-reset"; |
| 33 | #reset-cells = <2>; |
| 34 | }; |
| 35 | }; |
| 36 | |
| 37 | chipid: chipid@43000014 { |
| 38 | compatible = "ti,am654-chipid"; |
| 39 | reg = <0x0 0x43000014 0x0 0x4>; |
| 40 | }; |
| 41 | |
| 42 | wkup_pmx0: pinmux@4301c000 { |
| 43 | compatible = "pinctrl-single"; |
| 44 | /* Proxy 0 addressing */ |
| 45 | reg = <0x00 0x4301c000 0x00 0x178>; |
| 46 | #pinctrl-cells = <1>; |
| 47 | pinctrl-single,register-width = <32>; |
| 48 | pinctrl-single,function-mask = <0xffffffff>; |
| 49 | }; |
| 50 | |
| 51 | mcu_ram: sram@41c00000 { |
| 52 | compatible = "mmio-sram"; |
| 53 | reg = <0x00 0x41c00000 0x00 0x100000>; |
| 54 | ranges = <0x0 0x00 0x41c00000 0x100000>; |
| 55 | #address-cells = <1>; |
| 56 | #size-cells = <1>; |
| 57 | }; |
| 58 | |
| 59 | wkup_uart0: serial@42300000 { |
| 60 | compatible = "ti,j721e-uart", "ti,am654-uart"; |
| 61 | reg = <0x00 0x42300000 0x00 0x100>; |
| 62 | reg-shift = <2>; |
| 63 | reg-io-width = <4>; |
| 64 | interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>; |
| 65 | clock-frequency = <48000000>; |
| 66 | current-speed = <115200>; |
| 67 | power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>; |
| 68 | clocks = <&k3_clks 287 2>; |
| 69 | clock-names = "fclk"; |
| 70 | }; |
| 71 | |
| 72 | wkup_i2c0: i2c@42120000 { |
| 73 | compatible = "ti,j721e-i2c", "ti,omap4-i2c"; |
| 74 | reg = <0x0 0x42120000 0x0 0x100>; |
| 75 | interrupts = <GIC_SPI 896 IRQ_TYPE_LEVEL_HIGH>; |
| 76 | #address-cells = <1>; |
| 77 | #size-cells = <0>; |
| 78 | clock-names = "fck"; |
| 79 | clocks = <&k3_clks 197 1>; |
| 80 | power-domains = <&k3_pds 197 TI_SCI_PD_EXCLUSIVE>; |
| 81 | }; |
| 82 | |
| 83 | mcu_uart0: serial@40a00000 { |
| 84 | compatible = "ti,j721e-uart", "ti,am654-uart"; |
| 85 | reg = <0x00 0x40a00000 0x00 0x100>; |
| 86 | reg-shift = <2>; |
| 87 | reg-io-width = <4>; |
| 88 | interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>; |
| 89 | clock-frequency = <96000000>; |
| 90 | current-speed = <115200>; |
| 91 | power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; |
| 92 | clocks = <&k3_clks 149 2>; |
| 93 | clock-names = "fclk"; |
| 94 | }; |
| 95 | |
| 96 | mcu_i2c0: i2c@40b00000 { |
| 97 | compatible = "ti,j721e-i2c", "ti,omap4-i2c"; |
| 98 | reg = <0x0 0x40b00000 0x0 0x100>; |
| 99 | interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; |
| 100 | #address-cells = <1>; |
| 101 | #size-cells = <0>; |
| 102 | clock-names = "fck"; |
| 103 | clocks = <&k3_clks 194 1>; |
| 104 | power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>; |
| 105 | }; |
| 106 | |
| 107 | mcu_i2c1: i2c@40b10000 { |
| 108 | compatible = "ti,j721e-i2c", "ti,omap4-i2c"; |
| 109 | reg = <0x0 0x40b10000 0x0 0x100>; |
| 110 | interrupts = <GIC_SPI 853 IRQ_TYPE_LEVEL_HIGH>; |
| 111 | #address-cells = <1>; |
| 112 | #size-cells = <0>; |
| 113 | clock-names = "fck"; |
| 114 | clocks = <&k3_clks 195 1>; |
| 115 | power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>; |
| 116 | }; |
| 117 | }; |