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Ashish Kumar227b4bc2017-08-31 16:12:54 +05301Overview
2--------
3The LS1088A Reference Design (RDB) is a high-performance computing,
4evaluation, and development platform that supports ARM SoC LS1088A and its
5derivatives.
6
7
8LS1088A SoC Overview
9--------------------------------------
10Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
11
12RDB Default Switch Settings (1: ON; 0: OFF)
13-------------------------------------------
14
15For QSPI Boot
16SW1 0011 0001
17SW2 x100 0000
18SW3 1111 0010
19SW4 1001 0011
20SW5 1111 0000
21
22For SD Boot
23SW1 0010 0000
24SW2 0100 0000
25SW3 1111 0010
26SW4 1001 0011
27SW5 1111 0000
28
29For eMMC Boot
30SW1 0010 0000
31SW2 1100 0000
32SW3 1111 0010
33SW4 1001 0011
34SW5 1111 0000
35
36Alternately you can use this command to switch from QSPI to SD
37
38=> i2c mw 66 0x60 0x20; i2c mw 66 10 10;i2c mw 66 10 21
39
40 LS1088ARDB board Overview
41 -------------------------
42 - SERDES Connections, 16 lanes supporting:
43 - PCI Express - 3.0
44 - SATA 3.0
Vladimir Oltean6a6e4022021-09-18 15:32:34 +030045 - 10GBase-R
Ashish Kumar227b4bc2017-08-31 16:12:54 +053046 - QSGMII
47 - DDR Controller
48 - One ports of 72-bits (8-bits ECC, 64-bits DATA) DDR4. Each port supports four
49 chip-selects on one DIMM connector. Support is up to 2133MT/s, Although MAX default
50 with FSL refernce software is 2100MT/s
51 - 2 QSPI-NOR Spansion(S25FS512SDSMFI011) flash of size 64MB
52 - IFC/Local Bus
53 - One 2 GB NAND flash with ECC support, not as boot source
54 - CPLD of size 2K
55 - USB 3.0
56 - Two high speed USB 3.0 ports
57 - First USB 3.0 port configured as Host with Type-A connector
58 - Second USB 3.0 port configured as OTG with micro-AB connector
59 - SDHC/eMMC
60 - SDHC slot and onboard eMMC are muxed together
61 - 4 I2C controllers
62 - Two SATA onboard connectors
63 - 2 UART
64 - JTAG support
65 - QSPI emulator support
66 - TDM riser support
Ashish Kumar1ef4c772017-08-31 16:12:55 +053067
68QDS Default Switch Settings (1: ON; 0: OFF)
69-------------------------------------------
70
71For 16b IFC-NOR
72SW1 0001 0010
73SW2 x110 1111
74
75For QSPI Boot
76SW1 0011 0001
77SW2 0110 1111
78
79For SD Boot
80SW1 0010 0000
81SW2 0110 1111
82
83For eMMC Boot
84SW1 0010 0000
85SW2 1110 1111
86
87For I2C (ext. addr.)
88SW1 0010 0100
89SW2 1110 1111
90
91SW3 to SW12 are identical for all boot source
92
93SW3 0010 0100
94SW4 0010 0000
95SW5 1110 0111
96SW6 1110 1000
97SW7 0001 1101
98SW8 0000 1101
99SW9 1100 1010
100SW10 1110 1000
101SW11 1111 0100
102SW12 1111 1111
103
104 LS1088AQDS board Overview
105 -------------------------
106 - SERDES Connections, 16 lanes supporting:
107 - PCI Express - 3.0
108 - SATA 3.0
Vladimir Oltean6a6e4022021-09-18 15:32:34 +0300109 - 2 10GBase-R
Ashish Kumar1ef4c772017-08-31 16:12:55 +0530110 - QSGMII, SGMII with help for Riser card
111 - 2 RGMII
112 - 5 slot for Riser card or PCIe NIC
113 - DDR Controller
114 - One ports of 72-bits (8-bits ECC, 64-bits DATA) DDR4. Each port supports four
115 chip-selects on one DIMM connector. Support is up to 2133MT/s, Although MAX default
116 with FSL refernce software is 2100MT/s
117 - 2 QSPI-NOR Spansion(S25FS512SDSMFI011) flash of size 64MB
118 - IFC/Local Bus
119 - One 2 GB NAND flash with ECC support, not as boot source
120 - CPLD of size 2K
121 - USB 3.0
122 - Two high speed USB 3.0 ports
123 - First USB 3.0 port configured as Host with Type-A connector
124 - Second USB 3.0 port configured as OTG with micro-AB connector
125 - SDHC/eMMC
126 - SDHC/eMMC slot via adaptor
127 - 4 I2C controllers
128 - Two SATA onboard connectors
129 - 2 UART
130 - JTAG support
131 - DSPI
132 - PROMJET support
133 - QSPI emulator support
134 - TDM riser support
135
136QSPI flash memory map valid for both QDS and RDB
137 Image Flash Offset
138 RCW+PBI 0x00000000
139 Boot firmware (U-Boot) 0x00100000
140 Boot firmware Environment 0x00300000
141 PPA firmware 0x00400000
142 DPAA2 MC 0x00A00000
143 DPAA2 DPL 0x00D00000
144 DPAA2 DPC 0x00E00000
145 Kernel.itb 0x01000000