Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 2 | /* |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 3 | * Copyright (c) 2015 Google, Inc |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 4 | * Copyright (c) 2011 The Chromium OS Authors. |
| 5 | * Copyright (C) 2009 NVIDIA, Corporation |
Simon Glass | 00be89c | 2014-09-08 13:44:14 -0600 | [diff] [blame] | 6 | * Copyright (C) 2007-2008 SMSC (Steve Glendinning) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 10 | #include <dm.h> |
Simon Glass | ce48e50 | 2015-07-07 20:53:38 -0600 | [diff] [blame] | 11 | #include <errno.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 12 | #include <log.h> |
Simon Glass | ce48e50 | 2015-07-07 20:53:38 -0600 | [diff] [blame] | 13 | #include <malloc.h> |
Simon Glass | 2dd337a | 2015-09-02 17:24:58 -0600 | [diff] [blame] | 14 | #include <memalign.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 15 | #include <net.h> |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 16 | #include <usb.h> |
Simon Glass | ce48e50 | 2015-07-07 20:53:38 -0600 | [diff] [blame] | 17 | #include <asm/unaligned.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 18 | #include <linux/delay.h> |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 19 | #include <linux/mii.h> |
| 20 | #include "usb_ether.h" |
| 21 | |
| 22 | /* SMSC LAN95xx based USB 2.0 Ethernet Devices */ |
| 23 | |
Suriyan Ramasami | e0f2f8c | 2013-10-07 20:30:58 -0700 | [diff] [blame] | 24 | /* LED defines */ |
| 25 | #define LED_GPIO_CFG (0x24) |
| 26 | #define LED_GPIO_CFG_SPD_LED (0x01000000) |
| 27 | #define LED_GPIO_CFG_LNK_LED (0x00100000) |
| 28 | #define LED_GPIO_CFG_FDX_LED (0x00010000) |
| 29 | |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 30 | /* Tx command words */ |
| 31 | #define TX_CMD_A_FIRST_SEG_ 0x00002000 |
| 32 | #define TX_CMD_A_LAST_SEG_ 0x00001000 |
| 33 | |
| 34 | /* Rx status word */ |
| 35 | #define RX_STS_FL_ 0x3FFF0000 /* Frame Length */ |
| 36 | #define RX_STS_ES_ 0x00008000 /* Error Summary */ |
| 37 | |
| 38 | /* SCSRs */ |
| 39 | #define ID_REV 0x00 |
| 40 | |
| 41 | #define INT_STS 0x08 |
| 42 | |
| 43 | #define TX_CFG 0x10 |
| 44 | #define TX_CFG_ON_ 0x00000004 |
| 45 | |
| 46 | #define HW_CFG 0x14 |
| 47 | #define HW_CFG_BIR_ 0x00001000 |
| 48 | #define HW_CFG_RXDOFF_ 0x00000600 |
| 49 | #define HW_CFG_MEF_ 0x00000020 |
| 50 | #define HW_CFG_BCE_ 0x00000002 |
| 51 | #define HW_CFG_LRST_ 0x00000008 |
| 52 | |
| 53 | #define PM_CTRL 0x20 |
| 54 | #define PM_CTL_PHY_RST_ 0x00000010 |
| 55 | |
| 56 | #define AFC_CFG 0x2C |
| 57 | |
| 58 | /* |
| 59 | * Hi watermark = 15.5Kb (~10 mtu pkts) |
| 60 | * low watermark = 3k (~2 mtu pkts) |
| 61 | * backpressure duration = ~ 350us |
| 62 | * Apply FC on any frame. |
| 63 | */ |
| 64 | #define AFC_CFG_DEFAULT 0x00F830A1 |
| 65 | |
| 66 | #define E2P_CMD 0x30 |
| 67 | #define E2P_CMD_BUSY_ 0x80000000 |
| 68 | #define E2P_CMD_READ_ 0x00000000 |
| 69 | #define E2P_CMD_TIMEOUT_ 0x00000400 |
| 70 | #define E2P_CMD_LOADED_ 0x00000200 |
| 71 | #define E2P_CMD_ADDR_ 0x000001FF |
| 72 | |
| 73 | #define E2P_DATA 0x34 |
| 74 | |
| 75 | #define BURST_CAP 0x38 |
| 76 | |
| 77 | #define INT_EP_CTL 0x68 |
| 78 | #define INT_EP_CTL_PHY_INT_ 0x00008000 |
| 79 | |
| 80 | #define BULK_IN_DLY 0x6C |
| 81 | |
| 82 | /* MAC CSRs */ |
| 83 | #define MAC_CR 0x100 |
| 84 | #define MAC_CR_MCPAS_ 0x00080000 |
| 85 | #define MAC_CR_PRMS_ 0x00040000 |
| 86 | #define MAC_CR_HPFILT_ 0x00002000 |
| 87 | #define MAC_CR_TXEN_ 0x00000008 |
| 88 | #define MAC_CR_RXEN_ 0x00000004 |
| 89 | |
| 90 | #define ADDRH 0x104 |
| 91 | |
| 92 | #define ADDRL 0x108 |
| 93 | |
| 94 | #define MII_ADDR 0x114 |
| 95 | #define MII_WRITE_ 0x02 |
| 96 | #define MII_BUSY_ 0x01 |
| 97 | #define MII_READ_ 0x00 /* ~of MII Write bit */ |
| 98 | |
| 99 | #define MII_DATA 0x118 |
| 100 | |
| 101 | #define FLOW 0x11C |
| 102 | |
| 103 | #define VLAN1 0x120 |
| 104 | |
| 105 | #define COE_CR 0x130 |
| 106 | #define Tx_COE_EN_ 0x00010000 |
| 107 | #define Rx_COE_EN_ 0x00000001 |
| 108 | |
| 109 | /* Vendor-specific PHY Definitions */ |
| 110 | #define PHY_INT_SRC 29 |
| 111 | |
| 112 | #define PHY_INT_MASK 30 |
| 113 | #define PHY_INT_MASK_ANEG_COMP_ ((u16)0x0040) |
| 114 | #define PHY_INT_MASK_LINK_DOWN_ ((u16)0x0010) |
| 115 | #define PHY_INT_MASK_DEFAULT_ (PHY_INT_MASK_ANEG_COMP_ | \ |
| 116 | PHY_INT_MASK_LINK_DOWN_) |
| 117 | |
| 118 | /* USB Vendor Requests */ |
| 119 | #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0 |
| 120 | #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1 |
| 121 | |
| 122 | /* Some extra defines */ |
| 123 | #define HS_USB_PKT_SIZE 512 |
| 124 | #define FS_USB_PKT_SIZE 64 |
Stefan Brüns | d3095fe | 2015-08-30 17:59:45 +0200 | [diff] [blame] | 125 | /* 5/33 is lower limit for BURST_CAP to work */ |
| 126 | #define DEFAULT_HS_BURST_CAP_SIZE (5 * HS_USB_PKT_SIZE) |
| 127 | #define DEFAULT_FS_BURST_CAP_SIZE (33 * FS_USB_PKT_SIZE) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 128 | #define DEFAULT_BULK_IN_DELAY 0x00002000 |
| 129 | #define MAX_SINGLE_PACKET_SIZE 2048 |
| 130 | #define EEPROM_MAC_OFFSET 0x01 |
| 131 | #define SMSC95XX_INTERNAL_PHY_ID 1 |
| 132 | #define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */ |
| 133 | |
| 134 | /* local defines */ |
| 135 | #define SMSC95XX_BASE_NAME "sms" |
| 136 | #define USB_CTRL_SET_TIMEOUT 5000 |
| 137 | #define USB_CTRL_GET_TIMEOUT 5000 |
| 138 | #define USB_BULK_SEND_TIMEOUT 5000 |
| 139 | #define USB_BULK_RECV_TIMEOUT 5000 |
| 140 | |
Stefan Brüns | d3095fe | 2015-08-30 17:59:45 +0200 | [diff] [blame] | 141 | #define RX_URB_SIZE DEFAULT_HS_BURST_CAP_SIZE |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 142 | #define PHY_CONNECT_TIMEOUT 5000 |
| 143 | |
| 144 | #define TURBO_MODE |
| 145 | |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 146 | #ifndef CONFIG_DM_ETH |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 147 | /* local vars */ |
| 148 | static int curr_eth_dev; /* index for name of next device detected */ |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 149 | #endif |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 150 | |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 151 | /* driver private */ |
| 152 | struct smsc95xx_private { |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 153 | #ifdef CONFIG_DM_ETH |
| 154 | struct ueth_data ueth; |
| 155 | #endif |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 156 | size_t rx_urb_size; /* maximum USB URB size */ |
| 157 | u32 mac_cr; /* MAC control register value */ |
| 158 | int have_hwaddr; /* 1 if we have a hardware MAC address */ |
| 159 | }; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 160 | |
| 161 | /* |
| 162 | * Smsc95xx infrastructure commands |
| 163 | */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 164 | static int smsc95xx_write_reg(struct usb_device *udev, u32 index, u32 data) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 165 | { |
| 166 | int len; |
Ilya Yanok | 43b56c2 | 2012-07-15 04:43:53 +0000 | [diff] [blame] | 167 | ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 168 | |
| 169 | cpu_to_le32s(&data); |
Ilya Yanok | 43b56c2 | 2012-07-15 04:43:53 +0000 | [diff] [blame] | 170 | tmpbuf[0] = data; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 171 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 172 | len = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), |
| 173 | USB_VENDOR_REQUEST_WRITE_REGISTER, |
| 174 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
| 175 | 0, index, tmpbuf, sizeof(data), |
| 176 | USB_CTRL_SET_TIMEOUT); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 177 | if (len != sizeof(data)) { |
| 178 | debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d", |
| 179 | index, data, len); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 180 | return -EIO; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 181 | } |
| 182 | return 0; |
| 183 | } |
| 184 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 185 | static int smsc95xx_read_reg(struct usb_device *udev, u32 index, u32 *data) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 186 | { |
| 187 | int len; |
Ilya Yanok | 43b56c2 | 2012-07-15 04:43:53 +0000 | [diff] [blame] | 188 | ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 189 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 190 | len = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), |
| 191 | USB_VENDOR_REQUEST_READ_REGISTER, |
| 192 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
Stephen Warren | b0e5b49 | 2016-03-22 22:28:16 -0600 | [diff] [blame] | 193 | 0, index, tmpbuf, sizeof(*data), |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 194 | USB_CTRL_GET_TIMEOUT); |
Ilya Yanok | 43b56c2 | 2012-07-15 04:43:53 +0000 | [diff] [blame] | 195 | *data = tmpbuf[0]; |
Stephen Warren | b0e5b49 | 2016-03-22 22:28:16 -0600 | [diff] [blame] | 196 | if (len != sizeof(*data)) { |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 197 | debug("smsc95xx_read_reg failed: index=%d, len=%d", |
| 198 | index, len); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 199 | return -EIO; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 200 | } |
| 201 | |
| 202 | le32_to_cpus(data); |
| 203 | return 0; |
| 204 | } |
| 205 | |
| 206 | /* Loop until the read is completed with timeout */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 207 | static int smsc95xx_phy_wait_not_busy(struct usb_device *udev) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 208 | { |
| 209 | unsigned long start_time = get_timer(0); |
| 210 | u32 val; |
| 211 | |
| 212 | do { |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 213 | smsc95xx_read_reg(udev, MII_ADDR, &val); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 214 | if (!(val & MII_BUSY_)) |
| 215 | return 0; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 216 | } while (get_timer(start_time) < 1000); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 217 | |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 218 | return -ETIMEDOUT; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 219 | } |
| 220 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 221 | static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 222 | { |
| 223 | u32 val, addr; |
| 224 | |
| 225 | /* confirm MII not busy */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 226 | if (smsc95xx_phy_wait_not_busy(udev)) { |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 227 | debug("MII is busy in smsc95xx_mdio_read\n"); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 228 | return -ETIMEDOUT; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 229 | } |
| 230 | |
| 231 | /* set the address, index & direction (read from PHY) */ |
| 232 | addr = (phy_id << 11) | (idx << 6) | MII_READ_; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 233 | smsc95xx_write_reg(udev, MII_ADDR, addr); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 234 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 235 | if (smsc95xx_phy_wait_not_busy(udev)) { |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 236 | debug("Timed out reading MII reg %02X\n", idx); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 237 | return -ETIMEDOUT; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 238 | } |
| 239 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 240 | smsc95xx_read_reg(udev, MII_DATA, &val); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 241 | |
| 242 | return (u16)(val & 0xFFFF); |
| 243 | } |
| 244 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 245 | static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx, |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 246 | int regval) |
| 247 | { |
| 248 | u32 val, addr; |
| 249 | |
| 250 | /* confirm MII not busy */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 251 | if (smsc95xx_phy_wait_not_busy(udev)) { |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 252 | debug("MII is busy in smsc95xx_mdio_write\n"); |
| 253 | return; |
| 254 | } |
| 255 | |
| 256 | val = regval; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 257 | smsc95xx_write_reg(udev, MII_DATA, val); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 258 | |
| 259 | /* set the address, index & direction (write to PHY) */ |
| 260 | addr = (phy_id << 11) | (idx << 6) | MII_WRITE_; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 261 | smsc95xx_write_reg(udev, MII_ADDR, addr); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 262 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 263 | if (smsc95xx_phy_wait_not_busy(udev)) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 264 | debug("Timed out writing MII reg %02X\n", idx); |
| 265 | } |
| 266 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 267 | static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 268 | { |
| 269 | unsigned long start_time = get_timer(0); |
| 270 | u32 val; |
| 271 | |
| 272 | do { |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 273 | smsc95xx_read_reg(udev, E2P_CMD, &val); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 274 | if (!(val & E2P_CMD_BUSY_)) |
| 275 | return 0; |
| 276 | udelay(40); |
| 277 | } while (get_timer(start_time) < 1 * 1000 * 1000); |
| 278 | |
| 279 | debug("EEPROM is busy\n"); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 280 | return -ETIMEDOUT; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 281 | } |
| 282 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 283 | static int smsc95xx_wait_eeprom(struct usb_device *udev) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 284 | { |
| 285 | unsigned long start_time = get_timer(0); |
| 286 | u32 val; |
| 287 | |
| 288 | do { |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 289 | smsc95xx_read_reg(udev, E2P_CMD, &val); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 290 | if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) |
| 291 | break; |
| 292 | udelay(40); |
| 293 | } while (get_timer(start_time) < 1 * 1000 * 1000); |
| 294 | |
| 295 | if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { |
| 296 | debug("EEPROM read operation timeout\n"); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 297 | return -ETIMEDOUT; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 298 | } |
| 299 | return 0; |
| 300 | } |
| 301 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 302 | static int smsc95xx_read_eeprom(struct usb_device *udev, u32 offset, u32 length, |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 303 | u8 *data) |
| 304 | { |
| 305 | u32 val; |
| 306 | int i, ret; |
| 307 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 308 | ret = smsc95xx_eeprom_confirm_not_busy(udev); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 309 | if (ret) |
| 310 | return ret; |
| 311 | |
| 312 | for (i = 0; i < length; i++) { |
| 313 | val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 314 | smsc95xx_write_reg(udev, E2P_CMD, val); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 315 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 316 | ret = smsc95xx_wait_eeprom(udev); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 317 | if (ret < 0) |
| 318 | return ret; |
| 319 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 320 | smsc95xx_read_reg(udev, E2P_DATA, &val); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 321 | data[i] = val & 0xFF; |
| 322 | offset++; |
| 323 | } |
| 324 | return 0; |
| 325 | } |
| 326 | |
| 327 | /* |
| 328 | * mii_nway_restart - restart NWay (autonegotiation) for this interface |
| 329 | * |
| 330 | * Returns 0 on success, negative on error. |
| 331 | */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 332 | static int mii_nway_restart(struct usb_device *udev, struct ueth_data *dev) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 333 | { |
| 334 | int bmcr; |
| 335 | int r = -1; |
| 336 | |
| 337 | /* if autoneg is off, it's an error */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 338 | bmcr = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMCR); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 339 | |
| 340 | if (bmcr & BMCR_ANENABLE) { |
| 341 | bmcr |= BMCR_ANRESTART; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 342 | smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, bmcr); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 343 | r = 0; |
| 344 | } |
| 345 | return r; |
| 346 | } |
| 347 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 348 | static int smsc95xx_phy_initialize(struct usb_device *udev, |
| 349 | struct ueth_data *dev) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 350 | { |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 351 | smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET); |
| 352 | smsc95xx_mdio_write(udev, dev->phy_id, MII_ADVERTISE, |
| 353 | ADVERTISE_ALL | ADVERTISE_CSMA | |
| 354 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 355 | |
| 356 | /* read to clear */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 357 | smsc95xx_mdio_read(udev, dev->phy_id, PHY_INT_SRC); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 358 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 359 | smsc95xx_mdio_write(udev, dev->phy_id, PHY_INT_MASK, |
| 360 | PHY_INT_MASK_DEFAULT_); |
| 361 | mii_nway_restart(udev, dev); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 362 | |
| 363 | debug("phy initialised succesfully\n"); |
| 364 | return 0; |
| 365 | } |
| 366 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 367 | static int smsc95xx_init_mac_address(unsigned char *enetaddr, |
| 368 | struct usb_device *udev) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 369 | { |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 370 | int ret; |
| 371 | |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 372 | /* try reading mac address from EEPROM */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 373 | ret = smsc95xx_read_eeprom(udev, EEPROM_MAC_OFFSET, ETH_ALEN, enetaddr); |
| 374 | if (ret) |
| 375 | return ret; |
| 376 | |
| 377 | if (is_valid_ethaddr(enetaddr)) { |
| 378 | /* eeprom values are valid so use them */ |
| 379 | debug("MAC address read from EEPROM\n"); |
| 380 | return 0; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 381 | } |
| 382 | |
| 383 | /* |
| 384 | * No eeprom, or eeprom values are invalid. Generating a random MAC |
| 385 | * address is not safe. Just return an error. |
| 386 | */ |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 387 | debug("Invalid MAC address read from EEPROM\n"); |
| 388 | |
| 389 | return -ENXIO; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 390 | } |
| 391 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 392 | static int smsc95xx_write_hwaddr_common(struct usb_device *udev, |
| 393 | struct smsc95xx_private *priv, |
| 394 | unsigned char *enetaddr) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 395 | { |
Chris Packham | fd3224b | 2016-07-13 09:52:36 +1200 | [diff] [blame] | 396 | u32 addr_lo = get_unaligned_le32(&enetaddr[0]); |
| 397 | u32 addr_hi = get_unaligned_le16(&enetaddr[4]); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 398 | int ret; |
| 399 | |
| 400 | /* set hardware address */ |
| 401 | debug("** %s()\n", __func__); |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 402 | ret = smsc95xx_write_reg(udev, ADDRL, addr_lo); |
Wolfgang Grandegger | f9af1f8 | 2011-11-14 23:19:15 +0000 | [diff] [blame] | 403 | if (ret < 0) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 404 | return ret; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 405 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 406 | ret = smsc95xx_write_reg(udev, ADDRH, addr_hi); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 407 | if (ret < 0) |
| 408 | return ret; |
Wolfgang Grandegger | f9af1f8 | 2011-11-14 23:19:15 +0000 | [diff] [blame] | 409 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 410 | debug("MAC %pM\n", enetaddr); |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 411 | priv->have_hwaddr = 1; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 412 | |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 413 | return 0; |
| 414 | } |
| 415 | |
| 416 | /* Enable or disable Tx & Rx checksum offload engines */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 417 | static int smsc95xx_set_csums(struct usb_device *udev, int use_tx_csum, |
| 418 | int use_rx_csum) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 419 | { |
| 420 | u32 read_buf; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 421 | int ret = smsc95xx_read_reg(udev, COE_CR, &read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 422 | if (ret < 0) |
| 423 | return ret; |
| 424 | |
| 425 | if (use_tx_csum) |
| 426 | read_buf |= Tx_COE_EN_; |
| 427 | else |
| 428 | read_buf &= ~Tx_COE_EN_; |
| 429 | |
| 430 | if (use_rx_csum) |
| 431 | read_buf |= Rx_COE_EN_; |
| 432 | else |
| 433 | read_buf &= ~Rx_COE_EN_; |
| 434 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 435 | ret = smsc95xx_write_reg(udev, COE_CR, read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 436 | if (ret < 0) |
| 437 | return ret; |
| 438 | |
| 439 | debug("COE_CR = 0x%08x\n", read_buf); |
| 440 | return 0; |
| 441 | } |
| 442 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 443 | static void smsc95xx_set_multicast(struct smsc95xx_private *priv) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 444 | { |
| 445 | /* No multicast in u-boot */ |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 446 | priv->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 447 | } |
| 448 | |
| 449 | /* starts the TX path */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 450 | static void smsc95xx_start_tx_path(struct usb_device *udev, |
| 451 | struct smsc95xx_private *priv) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 452 | { |
| 453 | u32 reg_val; |
| 454 | |
| 455 | /* Enable Tx at MAC */ |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 456 | priv->mac_cr |= MAC_CR_TXEN_; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 457 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 458 | smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 459 | |
| 460 | /* Enable Tx at SCSRs */ |
| 461 | reg_val = TX_CFG_ON_; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 462 | smsc95xx_write_reg(udev, TX_CFG, reg_val); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 463 | } |
| 464 | |
| 465 | /* Starts the Receive path */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 466 | static void smsc95xx_start_rx_path(struct usb_device *udev, |
| 467 | struct smsc95xx_private *priv) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 468 | { |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 469 | priv->mac_cr |= MAC_CR_RXEN_; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 470 | smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 471 | } |
| 472 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 473 | static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev, |
| 474 | struct smsc95xx_private *priv, |
| 475 | unsigned char *enetaddr) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 476 | { |
| 477 | int ret; |
| 478 | u32 write_buf; |
| 479 | u32 read_buf; |
| 480 | u32 burst_cap; |
| 481 | int timeout; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 482 | #define TIMEOUT_RESOLUTION 50 /* ms */ |
| 483 | int link_detected; |
| 484 | |
| 485 | debug("** %s()\n", __func__); |
| 486 | dev->phy_id = SMSC95XX_INTERNAL_PHY_ID; /* fixed phy id */ |
| 487 | |
| 488 | write_buf = HW_CFG_LRST_; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 489 | ret = smsc95xx_write_reg(udev, HW_CFG, write_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 490 | if (ret < 0) |
| 491 | return ret; |
| 492 | |
| 493 | timeout = 0; |
| 494 | do { |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 495 | ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 496 | if (ret < 0) |
| 497 | return ret; |
| 498 | udelay(10 * 1000); |
| 499 | timeout++; |
| 500 | } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); |
| 501 | |
| 502 | if (timeout >= 100) { |
| 503 | debug("timeout waiting for completion of Lite Reset\n"); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 504 | return -ETIMEDOUT; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 505 | } |
| 506 | |
| 507 | write_buf = PM_CTL_PHY_RST_; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 508 | ret = smsc95xx_write_reg(udev, PM_CTRL, write_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 509 | if (ret < 0) |
| 510 | return ret; |
| 511 | |
| 512 | timeout = 0; |
| 513 | do { |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 514 | ret = smsc95xx_read_reg(udev, PM_CTRL, &read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 515 | if (ret < 0) |
| 516 | return ret; |
| 517 | udelay(10 * 1000); |
| 518 | timeout++; |
| 519 | } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); |
| 520 | if (timeout >= 100) { |
| 521 | debug("timeout waiting for PHY Reset\n"); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 522 | return -ETIMEDOUT; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 523 | } |
Stephen Warren | c8bff83 | 2016-09-15 12:53:22 -0600 | [diff] [blame] | 524 | #ifndef CONFIG_DM_ETH |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 525 | if (!priv->have_hwaddr && smsc95xx_init_mac_address(enetaddr, udev) == |
| 526 | 0) |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 527 | priv->have_hwaddr = 1; |
Stephen Warren | c8bff83 | 2016-09-15 12:53:22 -0600 | [diff] [blame] | 528 | #endif |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 529 | if (!priv->have_hwaddr) { |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 530 | puts("Error: SMSC95xx: No MAC address set - set usbethaddr\n"); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 531 | return -EADDRNOTAVAIL; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 532 | } |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 533 | ret = smsc95xx_write_hwaddr_common(udev, priv, enetaddr); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 534 | if (ret < 0) |
| 535 | return ret; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 536 | |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 537 | #ifdef TURBO_MODE |
| 538 | if (dev->pusb_dev->speed == USB_SPEED_HIGH) { |
| 539 | burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 540 | priv->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 541 | } else { |
| 542 | burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 543 | priv->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 544 | } |
| 545 | #else |
| 546 | burst_cap = 0; |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 547 | priv->rx_urb_size = MAX_SINGLE_PACKET_SIZE; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 548 | #endif |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 549 | debug("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 550 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 551 | ret = smsc95xx_write_reg(udev, BURST_CAP, burst_cap); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 552 | if (ret < 0) |
| 553 | return ret; |
| 554 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 555 | ret = smsc95xx_read_reg(udev, BURST_CAP, &read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 556 | if (ret < 0) |
| 557 | return ret; |
| 558 | debug("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf); |
| 559 | |
| 560 | read_buf = DEFAULT_BULK_IN_DELAY; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 561 | ret = smsc95xx_write_reg(udev, BULK_IN_DLY, read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 562 | if (ret < 0) |
| 563 | return ret; |
| 564 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 565 | ret = smsc95xx_read_reg(udev, BULK_IN_DLY, &read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 566 | if (ret < 0) |
| 567 | return ret; |
| 568 | debug("Read Value from BULK_IN_DLY after writing: " |
| 569 | "0x%08x\n", read_buf); |
| 570 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 571 | ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 572 | if (ret < 0) |
| 573 | return ret; |
| 574 | debug("Read Value from HW_CFG: 0x%08x\n", read_buf); |
| 575 | |
| 576 | #ifdef TURBO_MODE |
| 577 | read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); |
| 578 | #endif |
| 579 | read_buf &= ~HW_CFG_RXDOFF_; |
| 580 | |
| 581 | #define NET_IP_ALIGN 0 |
| 582 | read_buf |= NET_IP_ALIGN << 9; |
| 583 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 584 | ret = smsc95xx_write_reg(udev, HW_CFG, read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 585 | if (ret < 0) |
| 586 | return ret; |
| 587 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 588 | ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 589 | if (ret < 0) |
| 590 | return ret; |
| 591 | debug("Read Value from HW_CFG after writing: 0x%08x\n", read_buf); |
| 592 | |
| 593 | write_buf = 0xFFFFFFFF; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 594 | ret = smsc95xx_write_reg(udev, INT_STS, write_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 595 | if (ret < 0) |
| 596 | return ret; |
| 597 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 598 | ret = smsc95xx_read_reg(udev, ID_REV, &read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 599 | if (ret < 0) |
| 600 | return ret; |
| 601 | debug("ID_REV = 0x%08x\n", read_buf); |
| 602 | |
Suriyan Ramasami | e0f2f8c | 2013-10-07 20:30:58 -0700 | [diff] [blame] | 603 | /* Configure GPIO pins as LED outputs */ |
| 604 | write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | |
| 605 | LED_GPIO_CFG_FDX_LED; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 606 | ret = smsc95xx_write_reg(udev, LED_GPIO_CFG, write_buf); |
Suriyan Ramasami | e0f2f8c | 2013-10-07 20:30:58 -0700 | [diff] [blame] | 607 | if (ret < 0) |
| 608 | return ret; |
| 609 | debug("LED_GPIO_CFG set\n"); |
| 610 | |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 611 | /* Init Tx */ |
| 612 | write_buf = 0; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 613 | ret = smsc95xx_write_reg(udev, FLOW, write_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 614 | if (ret < 0) |
| 615 | return ret; |
| 616 | |
| 617 | read_buf = AFC_CFG_DEFAULT; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 618 | ret = smsc95xx_write_reg(udev, AFC_CFG, read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 619 | if (ret < 0) |
| 620 | return ret; |
| 621 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 622 | ret = smsc95xx_read_reg(udev, MAC_CR, &priv->mac_cr); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 623 | if (ret < 0) |
| 624 | return ret; |
| 625 | |
| 626 | /* Init Rx. Set Vlan */ |
| 627 | write_buf = (u32)ETH_P_8021Q; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 628 | ret = smsc95xx_write_reg(udev, VLAN1, write_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 629 | if (ret < 0) |
| 630 | return ret; |
| 631 | |
| 632 | /* Disable checksum offload engines */ |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 633 | ret = smsc95xx_set_csums(udev, 0, 0); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 634 | if (ret < 0) { |
| 635 | debug("Failed to set csum offload: %d\n", ret); |
| 636 | return ret; |
| 637 | } |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 638 | smsc95xx_set_multicast(priv); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 639 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 640 | ret = smsc95xx_phy_initialize(udev, dev); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 641 | if (ret < 0) |
| 642 | return ret; |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 643 | ret = smsc95xx_read_reg(udev, INT_EP_CTL, &read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 644 | if (ret < 0) |
| 645 | return ret; |
| 646 | |
| 647 | /* enable PHY interrupts */ |
| 648 | read_buf |= INT_EP_CTL_PHY_INT_; |
| 649 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 650 | ret = smsc95xx_write_reg(udev, INT_EP_CTL, read_buf); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 651 | if (ret < 0) |
| 652 | return ret; |
| 653 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 654 | smsc95xx_start_tx_path(udev, priv); |
| 655 | smsc95xx_start_rx_path(udev, priv); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 656 | |
| 657 | timeout = 0; |
| 658 | do { |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 659 | link_detected = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMSR) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 660 | & BMSR_LSTATUS; |
| 661 | if (!link_detected) { |
| 662 | if (timeout == 0) |
| 663 | printf("Waiting for Ethernet connection... "); |
| 664 | udelay(TIMEOUT_RESOLUTION * 1000); |
| 665 | timeout += TIMEOUT_RESOLUTION; |
| 666 | } |
| 667 | } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT); |
| 668 | if (link_detected) { |
| 669 | if (timeout != 0) |
| 670 | printf("done.\n"); |
| 671 | } else { |
| 672 | printf("unable to connect.\n"); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 673 | return -EIO; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 674 | } |
| 675 | return 0; |
| 676 | } |
| 677 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 678 | static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length) |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 679 | { |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 680 | int err; |
| 681 | int actual_len; |
| 682 | u32 tx_cmd_a; |
| 683 | u32 tx_cmd_b; |
Ilya Yanok | 43b56c2 | 2012-07-15 04:43:53 +0000 | [diff] [blame] | 684 | ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg, |
| 685 | PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 686 | |
Prabhakar Kushwaha | 91d5254 | 2015-10-25 13:18:41 +0530 | [diff] [blame] | 687 | debug("** %s(), len %d, buf %#x\n", __func__, length, |
| 688 | (unsigned int)(ulong)msg); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 689 | if (length > PKTSIZE) |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 690 | return -ENOSPC; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 691 | |
| 692 | tx_cmd_a = (u32)length | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; |
| 693 | tx_cmd_b = (u32)length; |
| 694 | cpu_to_le32s(&tx_cmd_a); |
| 695 | cpu_to_le32s(&tx_cmd_b); |
| 696 | |
| 697 | /* prepend cmd_a and cmd_b */ |
| 698 | memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a)); |
| 699 | memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b)); |
| 700 | memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet, |
| 701 | length); |
| 702 | err = usb_bulk_msg(dev->pusb_dev, |
| 703 | usb_sndbulkpipe(dev->pusb_dev, dev->ep_out), |
| 704 | (void *)msg, |
| 705 | length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), |
| 706 | &actual_len, |
| 707 | USB_BULK_SEND_TIMEOUT); |
| 708 | debug("Tx: len = %u, actual = %u, err = %d\n", |
Prabhakar Kushwaha | 91d5254 | 2015-10-25 13:18:41 +0530 | [diff] [blame] | 709 | (unsigned int)(length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)), |
| 710 | (unsigned int)actual_len, err); |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 711 | |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 712 | return err; |
| 713 | } |
| 714 | |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 715 | #ifndef CONFIG_DM_ETH |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 716 | /* |
| 717 | * Smsc95xx callbacks |
| 718 | */ |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 719 | static int smsc95xx_init(struct eth_device *eth, struct bd_info *bd) |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 720 | { |
| 721 | struct ueth_data *dev = (struct ueth_data *)eth->priv; |
| 722 | struct usb_device *udev = dev->pusb_dev; |
| 723 | struct smsc95xx_private *priv = |
| 724 | (struct smsc95xx_private *)dev->dev_priv; |
| 725 | |
| 726 | return smsc95xx_init_common(udev, dev, priv, eth->enetaddr); |
| 727 | } |
| 728 | |
| 729 | static int smsc95xx_send(struct eth_device *eth, void *packet, int length) |
| 730 | { |
| 731 | struct ueth_data *dev = (struct ueth_data *)eth->priv; |
| 732 | |
| 733 | return smsc95xx_send_common(dev, packet, length); |
| 734 | } |
| 735 | |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 736 | static int smsc95xx_recv(struct eth_device *eth) |
| 737 | { |
| 738 | struct ueth_data *dev = (struct ueth_data *)eth->priv; |
Simon Glass | 4d89e5b | 2015-07-07 20:53:39 -0600 | [diff] [blame] | 739 | DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, RX_URB_SIZE); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 740 | unsigned char *buf_ptr; |
| 741 | int err; |
| 742 | int actual_len; |
| 743 | u32 packet_len; |
| 744 | int cur_buf_align; |
| 745 | |
| 746 | debug("** %s()\n", __func__); |
| 747 | err = usb_bulk_msg(dev->pusb_dev, |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 748 | usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in), |
| 749 | (void *)recv_buf, RX_URB_SIZE, &actual_len, |
| 750 | USB_BULK_RECV_TIMEOUT); |
Simon Glass | 4d89e5b | 2015-07-07 20:53:39 -0600 | [diff] [blame] | 751 | debug("Rx: len = %u, actual = %u, err = %d\n", RX_URB_SIZE, |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 752 | actual_len, err); |
| 753 | if (err != 0) { |
| 754 | debug("Rx: failed to receive\n"); |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 755 | return -err; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 756 | } |
Simon Glass | 4d89e5b | 2015-07-07 20:53:39 -0600 | [diff] [blame] | 757 | if (actual_len > RX_URB_SIZE) { |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 758 | debug("Rx: received too many bytes %d\n", actual_len); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 759 | return -ENOSPC; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 760 | } |
| 761 | |
| 762 | buf_ptr = recv_buf; |
| 763 | while (actual_len > 0) { |
| 764 | /* |
| 765 | * 1st 4 bytes contain the length of the actual data plus error |
| 766 | * info. Extract data length. |
| 767 | */ |
| 768 | if (actual_len < sizeof(packet_len)) { |
| 769 | debug("Rx: incomplete packet length\n"); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 770 | return -EIO; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 771 | } |
| 772 | memcpy(&packet_len, buf_ptr, sizeof(packet_len)); |
| 773 | le32_to_cpus(&packet_len); |
| 774 | if (packet_len & RX_STS_ES_) { |
| 775 | debug("Rx: Error header=%#x", packet_len); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 776 | return -EIO; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 777 | } |
| 778 | packet_len = ((packet_len & RX_STS_FL_) >> 16); |
| 779 | |
| 780 | if (packet_len > actual_len - sizeof(packet_len)) { |
| 781 | debug("Rx: too large packet: %d\n", packet_len); |
Simon Glass | ebe0e5a | 2015-07-07 20:53:40 -0600 | [diff] [blame] | 782 | return -EIO; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 783 | } |
| 784 | |
| 785 | /* Notify net stack */ |
Joe Hershberger | 9f09a36 | 2015-04-08 01:41:06 -0500 | [diff] [blame] | 786 | net_process_received_packet(buf_ptr + sizeof(packet_len), |
| 787 | packet_len - 4); |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 788 | |
| 789 | /* Adjust for next iteration */ |
| 790 | actual_len -= sizeof(packet_len) + packet_len; |
| 791 | buf_ptr += sizeof(packet_len) + packet_len; |
Prabhakar Kushwaha | 91d5254 | 2015-10-25 13:18:41 +0530 | [diff] [blame] | 792 | cur_buf_align = (ulong)buf_ptr - (ulong)recv_buf; |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 793 | |
| 794 | if (cur_buf_align & 0x03) { |
| 795 | int align = 4 - (cur_buf_align & 0x03); |
| 796 | |
| 797 | actual_len -= align; |
| 798 | buf_ptr += align; |
| 799 | } |
| 800 | } |
| 801 | return err; |
| 802 | } |
| 803 | |
| 804 | static void smsc95xx_halt(struct eth_device *eth) |
| 805 | { |
| 806 | debug("** %s()\n", __func__); |
| 807 | } |
| 808 | |
Simon Glass | 3faecae | 2015-07-07 20:53:41 -0600 | [diff] [blame] | 809 | static int smsc95xx_write_hwaddr(struct eth_device *eth) |
| 810 | { |
| 811 | struct ueth_data *dev = eth->priv; |
| 812 | struct usb_device *udev = dev->pusb_dev; |
| 813 | struct smsc95xx_private *priv = dev->dev_priv; |
| 814 | |
| 815 | return smsc95xx_write_hwaddr_common(udev, priv, eth->enetaddr); |
| 816 | } |
| 817 | |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 818 | /* |
| 819 | * SMSC probing functions |
| 820 | */ |
| 821 | void smsc95xx_eth_before_probe(void) |
| 822 | { |
| 823 | curr_eth_dev = 0; |
| 824 | } |
| 825 | |
| 826 | struct smsc95xx_dongle { |
| 827 | unsigned short vendor; |
| 828 | unsigned short product; |
| 829 | }; |
| 830 | |
| 831 | static const struct smsc95xx_dongle smsc95xx_dongles[] = { |
| 832 | { 0x0424, 0xec00 }, /* LAN9512/LAN9514 Ethernet */ |
| 833 | { 0x0424, 0x9500 }, /* LAN9500 Ethernet */ |
Lubomir Popov | 7ca25b6 | 2013-04-01 04:50:55 +0000 | [diff] [blame] | 834 | { 0x0424, 0x9730 }, /* LAN9730 Ethernet (HSIC) */ |
Stefan Roese | 8aa7b04 | 2013-07-03 18:34:54 +0200 | [diff] [blame] | 835 | { 0x0424, 0x9900 }, /* SMSC9500 USB Ethernet Device (SAL10) */ |
Ilya Ledvich | 180bb6a | 2014-03-12 10:36:31 +0200 | [diff] [blame] | 836 | { 0x0424, 0x9e00 }, /* LAN9500A Ethernet */ |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 837 | { 0x0000, 0x0000 } /* END - Do not remove */ |
| 838 | }; |
| 839 | |
| 840 | /* Probe to see if a new device is actually an SMSC device */ |
| 841 | int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, |
| 842 | struct ueth_data *ss) |
| 843 | { |
| 844 | struct usb_interface *iface; |
| 845 | struct usb_interface_descriptor *iface_desc; |
| 846 | int i; |
| 847 | |
| 848 | /* let's examine the device now */ |
| 849 | iface = &dev->config.if_desc[ifnum]; |
| 850 | iface_desc = &dev->config.if_desc[ifnum].desc; |
| 851 | |
| 852 | for (i = 0; smsc95xx_dongles[i].vendor != 0; i++) { |
| 853 | if (dev->descriptor.idVendor == smsc95xx_dongles[i].vendor && |
| 854 | dev->descriptor.idProduct == smsc95xx_dongles[i].product) |
| 855 | /* Found a supported dongle */ |
| 856 | break; |
| 857 | } |
| 858 | if (smsc95xx_dongles[i].vendor == 0) |
| 859 | return 0; |
| 860 | |
| 861 | /* At this point, we know we've got a live one */ |
| 862 | debug("\n\nUSB Ethernet device detected\n"); |
| 863 | memset(ss, '\0', sizeof(struct ueth_data)); |
| 864 | |
| 865 | /* Initialize the ueth_data structure with some useful info */ |
| 866 | ss->ifnum = ifnum; |
| 867 | ss->pusb_dev = dev; |
| 868 | ss->subclass = iface_desc->bInterfaceSubClass; |
| 869 | ss->protocol = iface_desc->bInterfaceProtocol; |
| 870 | |
| 871 | /* |
| 872 | * We are expecting a minimum of 3 endpoints - in, out (bulk), and int. |
| 873 | * We will ignore any others. |
| 874 | */ |
| 875 | for (i = 0; i < iface_desc->bNumEndpoints; i++) { |
| 876 | /* is it an BULK endpoint? */ |
| 877 | if ((iface->ep_desc[i].bmAttributes & |
| 878 | USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) { |
| 879 | if (iface->ep_desc[i].bEndpointAddress & USB_DIR_IN) |
| 880 | ss->ep_in = |
| 881 | iface->ep_desc[i].bEndpointAddress & |
| 882 | USB_ENDPOINT_NUMBER_MASK; |
| 883 | else |
| 884 | ss->ep_out = |
| 885 | iface->ep_desc[i].bEndpointAddress & |
| 886 | USB_ENDPOINT_NUMBER_MASK; |
| 887 | } |
| 888 | |
| 889 | /* is it an interrupt endpoint? */ |
| 890 | if ((iface->ep_desc[i].bmAttributes & |
| 891 | USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) { |
| 892 | ss->ep_int = iface->ep_desc[i].bEndpointAddress & |
| 893 | USB_ENDPOINT_NUMBER_MASK; |
| 894 | ss->irqinterval = iface->ep_desc[i].bInterval; |
| 895 | } |
| 896 | } |
| 897 | debug("Endpoints In %d Out %d Int %d\n", |
| 898 | ss->ep_in, ss->ep_out, ss->ep_int); |
| 899 | |
| 900 | /* Do some basic sanity checks, and bail if we find a problem */ |
| 901 | if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || |
| 902 | !ss->ep_in || !ss->ep_out || !ss->ep_int) { |
| 903 | debug("Problems with device\n"); |
| 904 | return 0; |
| 905 | } |
| 906 | dev->privptr = (void *)ss; |
Lucas Stach | 36267c4 | 2012-08-22 11:04:57 +0000 | [diff] [blame] | 907 | |
| 908 | /* alloc driver private */ |
| 909 | ss->dev_priv = calloc(1, sizeof(struct smsc95xx_private)); |
| 910 | if (!ss->dev_priv) |
| 911 | return 0; |
| 912 | |
Simon Glass | 246c119 | 2011-06-13 16:13:09 -0700 | [diff] [blame] | 913 | return 1; |
| 914 | } |
| 915 | |
| 916 | int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss, |
| 917 | struct eth_device *eth) |
| 918 | { |
| 919 | debug("** %s()\n", __func__); |
| 920 | if (!eth) { |
| 921 | debug("%s: missing parameter.\n", __func__); |
| 922 | return 0; |
| 923 | } |
| 924 | sprintf(eth->name, "%s%d", SMSC95XX_BASE_NAME, curr_eth_dev++); |
| 925 | eth->init = smsc95xx_init; |
| 926 | eth->send = smsc95xx_send; |
| 927 | eth->recv = smsc95xx_recv; |
| 928 | eth->halt = smsc95xx_halt; |
| 929 | eth->write_hwaddr = smsc95xx_write_hwaddr; |
| 930 | eth->priv = ss; |
| 931 | return 1; |
| 932 | } |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 933 | #endif /* !CONFIG_DM_ETH */ |
| 934 | |
| 935 | #ifdef CONFIG_DM_ETH |
| 936 | static int smsc95xx_eth_start(struct udevice *dev) |
| 937 | { |
Simon Glass | de44acf | 2015-09-28 23:32:01 -0600 | [diff] [blame] | 938 | struct usb_device *udev = dev_get_parent_priv(dev); |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 939 | struct smsc95xx_private *priv = dev_get_priv(dev); |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 940 | struct eth_pdata *pdata = dev_get_plat(dev); |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 941 | |
| 942 | /* Driver-model Ethernet ensures we have this */ |
| 943 | priv->have_hwaddr = 1; |
| 944 | |
| 945 | return smsc95xx_init_common(udev, &priv->ueth, priv, pdata->enetaddr); |
| 946 | } |
| 947 | |
| 948 | void smsc95xx_eth_stop(struct udevice *dev) |
| 949 | { |
| 950 | debug("** %s()\n", __func__); |
| 951 | } |
| 952 | |
| 953 | int smsc95xx_eth_send(struct udevice *dev, void *packet, int length) |
| 954 | { |
| 955 | struct smsc95xx_private *priv = dev_get_priv(dev); |
| 956 | |
| 957 | return smsc95xx_send_common(&priv->ueth, packet, length); |
| 958 | } |
| 959 | |
| 960 | int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp) |
| 961 | { |
| 962 | struct smsc95xx_private *priv = dev_get_priv(dev); |
| 963 | struct ueth_data *ueth = &priv->ueth; |
| 964 | uint8_t *ptr; |
| 965 | int ret, len; |
| 966 | u32 packet_len; |
| 967 | |
| 968 | len = usb_ether_get_rx_bytes(ueth, &ptr); |
| 969 | debug("%s: first try, len=%d\n", __func__, len); |
| 970 | if (!len) { |
| 971 | if (!(flags & ETH_RECV_CHECK_DEVICE)) |
| 972 | return -EAGAIN; |
| 973 | ret = usb_ether_receive(ueth, RX_URB_SIZE); |
| 974 | if (ret == -EAGAIN) |
| 975 | return ret; |
| 976 | |
| 977 | len = usb_ether_get_rx_bytes(ueth, &ptr); |
| 978 | debug("%s: second try, len=%d\n", __func__, len); |
| 979 | } |
| 980 | |
| 981 | /* |
| 982 | * 1st 4 bytes contain the length of the actual data plus error info. |
| 983 | * Extract data length. |
| 984 | */ |
| 985 | if (len < sizeof(packet_len)) { |
| 986 | debug("Rx: incomplete packet length\n"); |
| 987 | goto err; |
| 988 | } |
| 989 | memcpy(&packet_len, ptr, sizeof(packet_len)); |
| 990 | le32_to_cpus(&packet_len); |
| 991 | if (packet_len & RX_STS_ES_) { |
| 992 | debug("Rx: Error header=%#x", packet_len); |
| 993 | goto err; |
| 994 | } |
| 995 | packet_len = ((packet_len & RX_STS_FL_) >> 16); |
| 996 | |
| 997 | if (packet_len > len - sizeof(packet_len)) { |
| 998 | debug("Rx: too large packet: %d\n", packet_len); |
| 999 | goto err; |
| 1000 | } |
| 1001 | |
| 1002 | *packetp = ptr + sizeof(packet_len); |
Simon Glass | b8fa836 | 2017-04-05 16:23:28 -0600 | [diff] [blame] | 1003 | return packet_len - 4; |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 1004 | |
| 1005 | err: |
| 1006 | usb_ether_advance_rxbuf(ueth, -1); |
| 1007 | return -EINVAL; |
| 1008 | } |
| 1009 | |
| 1010 | static int smsc95xx_free_pkt(struct udevice *dev, uchar *packet, int packet_len) |
| 1011 | { |
| 1012 | struct smsc95xx_private *priv = dev_get_priv(dev); |
| 1013 | |
Simon Glass | b8fa836 | 2017-04-05 16:23:28 -0600 | [diff] [blame] | 1014 | packet_len = ALIGN(packet_len + sizeof(u32), 4); |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 1015 | usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len); |
| 1016 | |
| 1017 | return 0; |
| 1018 | } |
| 1019 | |
| 1020 | int smsc95xx_write_hwaddr(struct udevice *dev) |
| 1021 | { |
Simon Glass | de44acf | 2015-09-28 23:32:01 -0600 | [diff] [blame] | 1022 | struct usb_device *udev = dev_get_parent_priv(dev); |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 1023 | struct eth_pdata *pdata = dev_get_plat(dev); |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 1024 | struct smsc95xx_private *priv = dev_get_priv(dev); |
| 1025 | |
| 1026 | return smsc95xx_write_hwaddr_common(udev, priv, pdata->enetaddr); |
| 1027 | } |
| 1028 | |
Stephen Warren | c8bff83 | 2016-09-15 12:53:22 -0600 | [diff] [blame] | 1029 | int smsc95xx_read_rom_hwaddr(struct udevice *dev) |
| 1030 | { |
| 1031 | struct usb_device *udev = dev_get_parent_priv(dev); |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 1032 | struct eth_pdata *pdata = dev_get_plat(dev); |
Stephen Warren | c8bff83 | 2016-09-15 12:53:22 -0600 | [diff] [blame] | 1033 | int ret; |
| 1034 | |
| 1035 | ret = smsc95xx_init_mac_address(pdata->enetaddr, udev); |
| 1036 | if (ret) |
| 1037 | memset(pdata->enetaddr, 0, 6); |
| 1038 | |
| 1039 | return 0; |
| 1040 | } |
| 1041 | |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 1042 | static int smsc95xx_eth_probe(struct udevice *dev) |
| 1043 | { |
| 1044 | struct smsc95xx_private *priv = dev_get_priv(dev); |
| 1045 | struct ueth_data *ueth = &priv->ueth; |
| 1046 | |
| 1047 | return usb_ether_register(dev, ueth, RX_URB_SIZE); |
| 1048 | } |
| 1049 | |
| 1050 | static const struct eth_ops smsc95xx_eth_ops = { |
| 1051 | .start = smsc95xx_eth_start, |
| 1052 | .send = smsc95xx_eth_send, |
| 1053 | .recv = smsc95xx_eth_recv, |
| 1054 | .free_pkt = smsc95xx_free_pkt, |
| 1055 | .stop = smsc95xx_eth_stop, |
| 1056 | .write_hwaddr = smsc95xx_write_hwaddr, |
Stephen Warren | c8bff83 | 2016-09-15 12:53:22 -0600 | [diff] [blame] | 1057 | .read_rom_hwaddr = smsc95xx_read_rom_hwaddr, |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 1058 | }; |
| 1059 | |
| 1060 | U_BOOT_DRIVER(smsc95xx_eth) = { |
| 1061 | .name = "smsc95xx_eth", |
| 1062 | .id = UCLASS_ETH, |
| 1063 | .probe = smsc95xx_eth_probe, |
| 1064 | .ops = &smsc95xx_eth_ops, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 1065 | .priv_auto = sizeof(struct smsc95xx_private), |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 1066 | .plat_auto = sizeof(struct eth_pdata), |
Simon Glass | 68c4197 | 2015-07-07 20:53:42 -0600 | [diff] [blame] | 1067 | }; |
| 1068 | |
| 1069 | static const struct usb_device_id smsc95xx_eth_id_table[] = { |
| 1070 | { USB_DEVICE(0x05ac, 0x1402) }, |
| 1071 | { USB_DEVICE(0x0424, 0xec00) }, /* LAN9512/LAN9514 Ethernet */ |
| 1072 | { USB_DEVICE(0x0424, 0x9500) }, /* LAN9500 Ethernet */ |
| 1073 | { USB_DEVICE(0x0424, 0x9730) }, /* LAN9730 Ethernet (HSIC) */ |
| 1074 | { USB_DEVICE(0x0424, 0x9900) }, /* SMSC9500 USB Ethernet (SAL10) */ |
| 1075 | { USB_DEVICE(0x0424, 0x9e00) }, /* LAN9500A Ethernet */ |
| 1076 | { } /* Terminating entry */ |
| 1077 | }; |
| 1078 | |
| 1079 | U_BOOT_USB_DEVICE(smsc95xx_eth, smsc95xx_eth_id_table); |
| 1080 | #endif |