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git01.mediatek.com / filogic / uboot / 2e1a48e6ac74e7ae7f6ed3d68ba64f4801e03f8d / . / configs / sama5d4_xplained_spiflash_defconfig
blob: 42829057b4899d2d01e89edbe88e131c50c590e3 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]3CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x26f00000
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]5CONFIG_TARGET_SAMA5D4_XPLAINED=y
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]6CONFIG_SPL_GPIO=y
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]7CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]8CONFIG_SPL_LIBGENERIC_SUPPORT=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]9CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]10CONFIG_NR_DRAM_BANKS=1
Markus Klotzbuecher7bd60e62019-05-15 15:15:54 +0200[diff] [blame]11CONFIG_ENV_SIZE=0x2000
12CONFIG_ENV_OFFSET=0x6000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]13CONFIG_ENV_SECT_SIZE=0x1000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]14CONFIG_DM_GPIO=y
Tom Rini6c75e632020-06-16 19:06:29 -0400[diff] [blame]15CONFIG_SPL_DM_SPI=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]16CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]17CONFIG_SPL_TEXT_BASE=0x200000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]18CONFIG_SPL_SERIAL_SUPPORT=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]19CONFIG_SPL_DRIVERS_MISC=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]20CONFIG_SPL=y
21CONFIG_DEBUG_UART_BOARD_INIT=y
22CONFIG_DEBUG_UART_BASE=0xfc00c000
23CONFIG_DEBUG_UART_CLOCK=100000000
Simon Glass219d6122016-09-12 23:18:57 -0600[diff] [blame]24CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassb24fdca2016-09-12 23:18:58 -0600[diff] [blame]25CONFIG_SPL_SPI_SUPPORT=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]26CONFIG_DEBUG_UART=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]27CONFIG_ENV_VARS_UBOOT_CONFIG=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]28CONFIG_FIT=y
Wenyou Yange035ea72017-09-14 11:07:44 +0800[diff] [blame]29CONFIG_SPI_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]30CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]31CONFIG_USE_BOOTARGS=y
Eugen Hristev68b37ab2018-04-24 12:00:16 +0300[diff] [blame]32CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]33# CONFIG_DISPLAY_BOARDINFO is not set
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]34CONFIG_MISC_INIT_R=y
Tom Rini90fa4e92020-07-06 15:46:38 -0400[diff] [blame]35CONFIG_SPL_DM_SPI_FLASH=y
Marek Vasute2542252018-04-07 16:05:27 +0200[diff] [blame]36CONFIG_SPL_SPI_LOAD=y
Tom Rinie22fa4f2021-08-10 15:08:46 -0400[diff] [blame]37CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]38CONFIG_HUSH_PARSER=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]39CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]40# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]41# CONFIG_CMD_LOADS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]42CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]43CONFIG_CMD_NAND=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]44CONFIG_CMD_USB=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]45CONFIG_CMD_DHCP=y
46CONFIG_CMD_PING=y
Eugen Hristev858f8d52021-05-26 16:05:57 +0300[diff] [blame]47CONFIG_CMD_HASH=y
48CONFIG_HASH_VERIFY=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]49CONFIG_CMD_FAT=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]50CONFIG_OF_CONTROL=y
51CONFIG_SPL_OF_CONTROL=y
52CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]53CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]54CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]55CONFIG_DM=y
56CONFIG_SPL_DM=y
57CONFIG_SPL_DM_SEQ_ALIAS=y
58CONFIG_CLK=y
59CONFIG_SPL_CLK=y
60CONFIG_CLK_AT91=y
61CONFIG_AT91_UTMI=y
62CONFIG_AT91_H32MX=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]63CONFIG_AT91_GPIO=y
Wenyou Yang16b26b02017-09-01 16:26:18 +0800[diff] [blame]64CONFIG_DM_I2C=y
65CONFIG_SYS_I2C_AT91=y
66CONFIG_I2C_EEPROM=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]67CONFIG_GENERIC_ATMEL_MCI=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]68CONFIG_MTD=y
Miquel Raynald0935362019-10-03 19:50:03 +0200[diff] [blame]69CONFIG_MTD_RAW_NAND=y
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]70CONFIG_NAND_ATMEL=y
Tudor Ambarus2c4f6ce2021-01-08 14:40:17 +0200[diff] [blame]71CONFIG_ATMEL_NAND_HW_PMECC=y
72CONFIG_PMECC_CAP=8
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]73CONFIG_DM_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]74CONFIG_SF_DEFAULT_SPEED=30000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]75CONFIG_SPI_FLASH_ATMEL=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]76CONFIG_DM_ETH=y
77CONFIG_MACB=y
78CONFIG_PINCTRL=y
79CONFIG_SPL_PINCTRL=y
80CONFIG_PINCTRL_AT91=y
81CONFIG_DM_SERIAL=y
Wenyou Yang4d8b3212017-04-13 10:31:18 +0800[diff] [blame]82CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]83CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]84CONFIG_SPI=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]85CONFIG_DM_SPI=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]86CONFIG_TIMER=y
87CONFIG_SPL_TIMER=y
88CONFIG_ATMEL_PIT_TIMER=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]89CONFIG_USB=y
Wenyou Yang3143ac22017-04-13 10:31:16 +0800[diff] [blame]90CONFIG_USB_EHCI_HCD=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]91CONFIG_USB_STORAGE=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]92CONFIG_USB_GADGET=y
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]93CONFIG_USB_GADGET_ATMEL_USBA=y
Wenyou Yang426691e2017-09-18 15:26:00 +0800[diff] [blame]94CONFIG_DM_VIDEO=y
Anatolij Gustschindba36702020-02-04 22:43:06 +0100[diff] [blame]95# CONFIG_VIDEO_BPP8 is not set
96# CONFIG_VIDEO_BPP32 is not set
Wenyou Yang426691e2017-09-18 15:26:00 +0800[diff] [blame]97CONFIG_ATMEL_HLCD=y
Eugen Hristev4b407012018-09-18 10:35:41 +0300[diff] [blame]98CONFIG_W1=y
99CONFIG_W1_GPIO=y
100CONFIG_W1_EEPROM=y
101CONFIG_W1_EEPROM_DS24XXX=y
Eugen Hristev4e4426e2018-09-18 10:35:52 +0300[diff] [blame]102CONFIG_OF_LIBFDT_OVERLAY=y