Blame - arch/arm/dts/zynq-microzed.dts - filogic/uboot

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Jagannadha Sutradharudu Teki	fc0d22b	2014-01-09 01:48:29 +0530	[diff] [blame]	1	/*
				2	* Xilinx MicroZED board DTS
				3	*
Michal Simek	9e5b344	2016-01-12 08:06:36 +0100	[diff] [blame]	4	* Copyright (C) 2013 - 2016 Xilinx, Inc.
Jagannadha Sutradharudu Teki	fc0d22b	2014-01-09 01:48:29 +0530	[diff] [blame]	5	*
				6	* SPDX-License-Identifier: GPL-2.0+
				7	*/
				8	/dts-v1/;
				9	#include "zynq-7000.dtsi"
				10
				11	/ {
				12	model = "Zynq MicroZED Board";
				13	compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
Masahiro Yamada	d6367a2	2014-05-15 20:37:54 +0900	[diff] [blame]	14
Masahiro Yamada	87f645e	2014-05-15 20:37:55 +0900	[diff] [blame]	15	aliases {
				16	serial0 = &uart1;
Jagan Teki	52b4702	2015-08-15 23:08:51 +0530	[diff] [blame]	17	spi0 = &qspi;
Michal Simek	9e5b344	2016-01-12 08:06:36 +0100	[diff] [blame]	18	mmc0 = &sdhci0;
Masahiro Yamada	87f645e	2014-05-15 20:37:55 +0900	[diff] [blame]	19	};
				20
Masahiro Yamada	d6367a2	2014-05-15 20:37:54 +0900	[diff] [blame]	21	memory {
				22	device_type = "memory";
				23	reg = <0 0x40000000>;
				24	};
Michal Simek	9e5b344	2016-01-12 08:06:36 +0100	[diff] [blame]	25
				26	chosen {
				27	bootargs = "earlyprintk";
				28	stdout-path = "serial0:115200n8";
				29	};
				30
				31	usb_phy0: phy0 {
				32	compatible = "usb-nop-xceiv";
				33	#phy-cells = <0>;
				34	};
Jagannadha Sutradharudu Teki	fc0d22b	2014-01-09 01:48:29 +0530	[diff] [blame]	35	};
Jagan Teki	52b4702	2015-08-15 23:08:51 +0530	[diff] [blame]	36
Michal Simek	9e5b344	2016-01-12 08:06:36 +0100	[diff] [blame]	37	&clkc {
				38	ps-clk-frequency = <33333333>;
				39	};
				40
Jagan Teki	52b4702	2015-08-15 23:08:51 +0530	[diff] [blame]	41	&qspi {
Nathan Rossi	6dc383d	2016-02-16 23:05:03 +1000	[diff] [blame]	42	u-boot,dm-pre-reloc;
Jagan Teki	52b4702	2015-08-15 23:08:51 +0530	[diff] [blame]	43	status = "okay";
				44	};
Simon Glass	8c7323a	2015-10-17 19:41:24 -0600	[diff] [blame]	45
				46	&uart1 {
				47	u-boot,dm-pre-reloc;
				48	status = "okay";
Michal Simek	9e5b344	2016-01-12 08:06:36 +0100	[diff] [blame]	49	};
				50
				51	&gem0 {
				52	status = "okay";
				53	phy-mode = "rgmii-id";
				54	phy-handle = <&ethernet_phy>;
				55
				56	ethernet_phy: ethernet-phy@0 {
				57	reg = <0>;
				58	};
				59	};
				60
				61	&sdhci0 {
				62	u-boot,dm-pre-reloc;
				63	status = "okay";
				64	};
				65
				66	&usb0 {
				67	status = "okay";
				68	dr_mode = "host";
				69	usb-phy = <&usb_phy0>;
Simon Glass	8c7323a	2015-10-17 19:41:24 -0600	[diff] [blame]	70	};