blob: 19f161cf5c1d6d9511b42158f7d6db883c33d971 [file] [log] [blame]
Patrick Delaunayff45fca2022-05-20 18:24:44 +02001if STM32MP15x
2
3config STM32MP15x_STM32IMAGE
4 bool "Support STM32 image for generated U-Boot image"
5 depends on TFABOOT
6 help
7 Support of STM32 image generation for SOC STM32MP15x
8 for TF-A boot when FIP container is not used
9
10choice
11 prompt "STM32MP15x board select"
12 optional
13
14config TARGET_ST_STM32MP15x
15 bool "STMicroelectronics STM32MP15x boards"
16 imply BOOTSTAGE
17 imply CMD_BOOTSTAGE
18 imply CMD_CLS if CMD_BMP
19 imply DISABLE_CONSOLE
20 imply PRE_CONSOLE_BUFFER
21 imply SILENT_CONSOLE
22 help
23 target the STMicroelectronics board with SOC STM32MP15x
24 managed by board/st/stm32mp1:
25 Evalulation board (EV1) or Discovery board (DK1 and DK2).
26 The difference between board are managed with devicetree
27
28config TARGET_DH_STM32MP1_PDK2
29 bool "DH STM32MP1 PDK2"
30 help
31 Target the DH PDK2 development kit with STM32MP15x SoM.
32
33config TARGET_MICROGEA_STM32MP1
34 bool "Engicam MicroGEA STM32MP1 SOM"
35 imply BOOTSTAGE
36 imply CMD_BOOTSTAGE
37 imply CMD_CLS if CMD_BMP
38 imply DISABLE_CONSOLE
39 imply PRE_CONSOLE_BUFFER
40 imply SILENT_CONSOLE
41 help
42 MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
43
44 MicroGEA STM32MP1 MicroDev 2.0:
45 * MicroDev 2.0 is a general purpose miniature carrier board with CAN,
46 LTE and LVDS panel interfaces.
47 * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
48 for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
49
50 MicroGEA STM32MP1 MicroDev 2.0 7" OF:
51 * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
52 panel and toucscreen.
53 * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
54 pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
55 Open Frame Solution board.
56
57config TARGET_ICORE_STM32MP1
58 bool "Engicam i.Core STM32MP1 SOM"
59 imply BOOTSTAGE
60 imply CMD_BOOTSTAGE
61 imply CMD_CLS if CMD_BMP
62 imply DISABLE_CONSOLE
63 imply PRE_CONSOLE_BUFFER
64 imply SILENT_CONSOLE
65 help
66 i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
67
68 i.Core STM32MP1 EDIMM2.2:
69 * EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
70 * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
71 creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
72
73 i.Core STM32MP1 C.TOUCH 2.0
74 * C.TOUCH 2.0 is a general purpose Carrier board.
75 * i.Core STM32MP1 needs to mount on top of this Carrier board
76 for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
77
78endchoice
79
80config SYS_TEXT_BASE
81 default 0xC0100000
82
83config PRE_CON_BUF_ADDR
84 default 0xC02FF000
85
86config PRE_CON_BUF_SZ
87 default 4096
88
89config BOOTSTAGE_STASH_ADDR
90 default 0xC3000000
91
92if BOOTCOUNT_GENERIC
93config SYS_BOOTCOUNT_SINGLEWORD
94 default y
95
96# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
97config SYS_BOOTCOUNT_ADDR
98 default 0x5C00A154
99endif
100
101if DEBUG_UART
102
103config DEBUG_UART_BOARD_INIT
104 default y
105
106# debug on UART4 by default
107config DEBUG_UART_BASE
108 default 0x40010000
109
110# clock source is HSI on reset
111config DEBUG_UART_CLOCK
112 default 64000000
113endif
114
115source "board/st/stm32mp1/Kconfig"
116source "board/dhelectronics/dh_stm32mp1/Kconfig"
117source "board/engicam/stm32mp1/Kconfig"
118
119endif