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git01.mediatek.com / filogic / uboot / 2cd2ff0384b630955aaee5415a6076e3f615a46b / . / arch / arm / dts / tegra30-htc-endeavoru.dts
blob: dbff795bd89bbc16a5743a89150272abe42ccb43 [file] [log] [blame]
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4/* This dts file describes the HTC One X smartphone */
5/* CPU Speedo ID 4, Soc Speedo ID 1, CPU Process: 1, Core Process: 0 */
6
7#include <dt-bindings/input/input.h>
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]8#include "tegra30.dtsi"
9
10/ {
11 model = "HTC One X";
12 compatible = "htc,endeavoru", "nvidia,tegra30";
13
14 chosen {
15 stdout-path = &uarta;
16 };
17
18 aliases {
19 i2c0 = &pwr_i2c;
20
21 mmc0 = &sdmmc4; /* eMMC */
22
23 rtc0 = &pmic;
24 rtc1 = "/rtc@7000e000";
25
26 usb0 = &micro_usb;
27 };
28
29 memory {
30 device_type = "memory";
31 reg = <0x80000000 0x40000000>;
32 };
33
34 host1x@50000000 {
35 dc@54200000 {
36 clocks = <&tegra_car TEGRA30_CLK_DISP1>,
37 <&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
38
39 rgb {
40 status = "okay";
41
42 nvidia,panel = <&dsia>;
43 };
44 };
45
46 dsia: dsi@54300000 {
47 status = "okay";
48
49 avdd-dsi-csi-supply = <&avdd_dsi_csi>;
50
51 panel = <&panel>;
52 };
53 };
54
Svyatoslav Ryhel3135d862023-11-28 13:43:31 +0200[diff] [blame]55 pinmux@70000868 {
56 pinctrl-names = "default";
57 pinctrl-0 = <&state_default>;
58
59 state_default: pinmux {
60 /* PORT A */
61 clk_32k_out {
62 nvidia,pins = "clk_32k_out_pa0";
63 nvidia,function = "blink";
64 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
65 nvidia,tristate = <TEGRA_PIN_DISABLE>;
66 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
67 };
68 bt_uart_cts {
69 nvidia,pins = "uart3_cts_n_pa1";
70 nvidia,function = "uartc";
71 nvidia,pull = <TEGRA_PIN_PULL_UP>;
72 nvidia,tristate = <TEGRA_PIN_DISABLE>;
73 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
74 };
75 aud_aic3008_i2s {
76 nvidia,pins = "dap2_fs_pa2",
77 "dap2_sclk_pa3",
78 "dap2_din_pa4",
79 "dap2_dout_pa5";
80 nvidia,function = "i2s1";
81 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
82 nvidia,tristate = <TEGRA_PIN_DISABLE>;
83 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
84 };
85 wifi_sdio_clock {
86 nvidia,pins = "sdmmc3_clk_pa6";
87 nvidia,function = "sdmmc3";
88 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
89 nvidia,tristate = <TEGRA_PIN_DISABLE>;
90 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
91 };
92 wifi_sdio_command {
93 nvidia,pins = "sdmmc3_cmd_pa7";
94 nvidia,function = "sdmmc3";
95 nvidia,pull = <TEGRA_PIN_PULL_UP>;
96 nvidia,tristate = <TEGRA_PIN_DISABLE>;
97 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
98 };
99
100 /* PORT B */
101 mdm_imc_uart {
102 nvidia,pins = "gmi_a17_pb0",
103 "gmi_a18_pb1";
104 nvidia,function = "uartd";
105 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
106 nvidia,tristate = <TEGRA_PIN_DISABLE>;
107 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
108 };
109 aud_3v3_en {
110 nvidia,pins = "lcd_pwr0_pb2",
111 "lcd_pclk_pb3";
112 nvidia,function = "displaya";
113 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
114 nvidia,tristate = <TEGRA_PIN_DISABLE>;
115 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
116 };
117 wifi_sdio_data {
118 nvidia,pins = "sdmmc3_dat3_pb4",
119 "sdmmc3_dat2_pb5",
120 "sdmmc3_dat1_pb6",
121 "sdmmc3_dat0_pb7";
122 nvidia,function = "sdmmc3";
123 nvidia,pull = <TEGRA_PIN_PULL_UP>;
124 nvidia,tristate = <TEGRA_PIN_DISABLE>;
125 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
126 };
127
128 /* PORT C */
129 bt_uart_rts {
130 nvidia,pins = "uart3_rts_n_pc0";
131 nvidia,function = "uartc";
132 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
133 nvidia,tristate = <TEGRA_PIN_DISABLE>;
134 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
135 };
136 mdm_ap2bb_rst_pwrdwn {
137 nvidia,pins = "lcd_pwr1_pc1";
138 nvidia,function = "rsvd4";
139 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
140 nvidia,tristate = <TEGRA_PIN_DISABLE>;
141 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
142 };
143 cam_spi_clk_do {
144 nvidia,pins = "uart2_txd_pc2",
145 "uart2_rxd_pc3";
146 nvidia,function = "spi4";
147 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
148 nvidia,tristate = <TEGRA_PIN_DISABLE>;
149 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
150 };
151 per_sensor_i2c {
152 nvidia,pins = "gen1_i2c_scl_pc4",
153 "gen1_i2c_sda_pc5";
154 nvidia,function = "i2c1";
155 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
156 nvidia,tristate = <TEGRA_PIN_DISABLE>;
157 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
158 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
159 };
160 mdm_ap2bb_slave_wakeup {
161 nvidia,pins = "lcd_pwr2_pc6";
162 nvidia,function = "displaya";
163 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
164 nvidia,tristate = <TEGRA_PIN_DISABLE>;
165 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
166 };
167 mhl_int {
168 nvidia,pins = "gmi_wp_n_pc7";
169 nvidia,function = "rsvd1";
170 nvidia,pull = <TEGRA_PIN_PULL_UP>;
171 nvidia,tristate = <TEGRA_PIN_DISABLE>;
172 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
173 };
174
175 /* PORT D */
176 sdmmc3_data {
177 nvidia,pins = "sdmmc3_dat5_pd0",
178 "sdmmc3_dat4_pd1";
179 nvidia,function = "sdmmc3";
180 nvidia,pull = <TEGRA_PIN_PULL_UP>;
181 nvidia,tristate = <TEGRA_PIN_DISABLE>;
182 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
183 };
184 aud_1v8_en {
185 nvidia,pins = "lcd_dc1_pd2";
186 nvidia,function = "rsvd4";
187 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
188 nvidia,tristate = <TEGRA_PIN_DISABLE>;
189 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
190 };
191 sdmmc3_dat6_pd3 {
192 nvidia,pins = "sdmmc3_dat6_pd3",
193 "sdmmc3_dat7_pd4";
194 nvidia,function = "rsvd1";
195 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
196 nvidia,tristate = <TEGRA_PIN_DISABLE>;
197 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
198 };
199
200 /* PORT E */
201 mhl_usb_sel {
202 nvidia,pins = "lcd_d0_pe0";
203 nvidia,function = "displaya";
204 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
205 nvidia,tristate = <TEGRA_PIN_DISABLE>;
206 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
207 };
208 lcd_d1_pe1 {
209 nvidia,pins = "lcd_d1_pe1";
210 nvidia,function = "displaya";
211 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
212 nvidia,tristate = <TEGRA_PIN_DISABLE>;
213 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
214 };
215 peh_cap_int {
216 nvidia,pins = "lcd_d2_pe2";
217 nvidia,function = "rsvd3";
218 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
219 nvidia,tristate = <TEGRA_PIN_DISABLE>;
220 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
221 };
222 mhl_1v2_en {
223 nvidia,pins = "lcd_d3_pe3",
224 "lcd_d4_pe4";
225 nvidia,function = "displaya";
226 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
227 nvidia,tristate = <TEGRA_PIN_DISABLE>;
228 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
229 };
230 dsp_lcm_1v8_en {
231 nvidia,pins = "lcd_d5_pe5";
232 nvidia,function = "displaya";
233 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
234 nvidia,tristate = <TEGRA_PIN_DISABLE>;
235 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
236 };
237 mhl_rst {
238 nvidia,pins = "lcd_d6_pe6";
239 nvidia,function = "rsvd3";
240 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
241 nvidia,tristate = <TEGRA_PIN_DISABLE>;
242 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
243 };
244 peh_vibrator_on {
245 nvidia,pins = "lcd_d7_pe7";
246 nvidia,function = "displaya";
247 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
248 nvidia,tristate = <TEGRA_PIN_DISABLE>;
249 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
250 };
251
252 /* PORT F */
253 cam_vcm_2v85_pwr {
254 nvidia,pins = "lcd_d8_pf0";
255 nvidia,function = "rsvd4";
256 nvidia,pull = <TEGRA_PIN_PULL_UP>;
257 nvidia,tristate = <TEGRA_PIN_DISABLE>;
258 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
259 };
260 lcd_d9_d13 {
261 nvidia,pins = "lcd_d9_pf1",
262 "lcd_d10_pf2",
263 "lcd_d11_pf3",
264 "lcd_d12_pf4",
265 "lcd_d13_pf5";
266 nvidia,function = "displaya";
267 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
268 nvidia,tristate = <TEGRA_PIN_DISABLE>;
269 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
270 };
271 cam_cam2_core_1v8_en {
272 nvidia,pins = "lcd_d14_pf6";
273 nvidia,function = "rsvd4";
274 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
275 nvidia,tristate = <TEGRA_PIN_DISABLE>;
276 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
277 };
278 sys_pmu_msecure {
279 nvidia,pins = "lcd_d15_pf7";
280 nvidia,function = "rsvd4";
281 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
282 nvidia,tristate = <TEGRA_PIN_DISABLE>;
283 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
284 };
285
286 /* PORT G */
287 bootstraps {
288 nvidia,pins = "gmi_ad0_pg0",
289 "gmi_ad1_pg1",
290 "gmi_ad2_pg2",
291 "gmi_ad3_pg3",
292 "gmi_ad4_pg4",
293 "gmi_ad5_pg5",
294 "gmi_ad6_pg6",
295 "gmi_ad7_pg7";
296 nvidia,function = "rsvd4";
297 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
298 nvidia,tristate = <TEGRA_PIN_DISABLE>;
299 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
300 };
301
302 /* PORT H */
303 haptic_pwm {
304 nvidia,pins = "gmi_ad8_ph0";
305 nvidia,function = "pwm0";
306 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
307 nvidia,tristate = <TEGRA_PIN_DISABLE>;
308 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
309 };
310 gmi_ad9 {
311 nvidia,pins = "gmi_ad9_ph1";
312 nvidia,function = "rsvd4";
313 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
314 nvidia,tristate = <TEGRA_PIN_DISABLE>;
315 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
316 };
317 gmi_ad10 {
318 nvidia,pins = "gmi_ad10_ph2";
319 nvidia,function = "nand";
320 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
321 nvidia,tristate = <TEGRA_PIN_DISABLE>;
322 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
323 };
324 dsp_tp_rst {
325 nvidia,pins = "gmi_ad11_ph3",
326 "gmi_ad12_ph4",
327 "gmi_ad13_ph5",
328 "gmi_ad14_ph6";
329 nvidia,function = "rsvd4";
330 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
331 nvidia,tristate = <TEGRA_PIN_DISABLE>;
332 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
333 };
334 gmi_ad15 {
335 nvidia,pins = "gmi_ad15_ph7";
336 nvidia,function = "nand";
337 nvidia,pull = <TEGRA_PIN_PULL_UP>;
338 nvidia,tristate = <TEGRA_PIN_ENABLE>;
339 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
340 };
341
342 /* PORT I */
343 gmi_wr_n {
344 nvidia,pins = "gmi_wr_n_pi0",
345 "gmi_oe_n_pi1",
346 "gmi_dqs_pi2",
347 "gmi_cs6_n_pi3";
348 nvidia,function = "rsvd4";
349 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
350 nvidia,tristate = <TEGRA_PIN_DISABLE>;
351 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
352 };
353 gmi_rst_n_pi4 {
354 nvidia,pins = "gmi_rst_n_pi4";
355 nvidia,function = "rsvd4";
356 nvidia,pull = <TEGRA_PIN_PULL_UP>;
357 nvidia,tristate = <TEGRA_PIN_ENABLE>;
358 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
359 };
360 sim_detect {
361 nvidia,pins = "gmi_iordy_pi5";
362 nvidia,function = "rsvd1";
363 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
364 nvidia,tristate = <TEGRA_PIN_ENABLE>;
365 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
366 };
367 peh_gyr_int {
368 nvidia,pins = "gmi_cs7_n_pi6",
369 "gmi_wait_pi7";
370 nvidia,function = "rsvd4";
371 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
372 nvidia,tristate = <TEGRA_PIN_DISABLE>;
373 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
374 };
375
376 /* PORT J */
377 mdm_bb2ap_host_wakeup {
378 nvidia,pins = "gmi_cs0_n_pj0";
379 nvidia,function = "gmi";
380 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
381 nvidia,tristate = <TEGRA_PIN_DISABLE>;
382 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
383 };
384 dsp_lcm_de {
385 nvidia,pins = "lcd_de_pj1";
386 nvidia,function = "displaya";
387 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
388 nvidia,tristate = <TEGRA_PIN_DISABLE>;
389 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
390 };
391 peh_comp_int {
392 nvidia,pins = "gmi_cs1_n_pj2";
393 nvidia,function = "rsvd1";
394 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
395 nvidia,tristate = <TEGRA_PIN_DISABLE>;
396 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
397 };
398 lcd_hsync {
399 nvidia,pins = "lcd_hsync_pj3";
400 nvidia,function = "displaya";
401 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
402 nvidia,tristate = <TEGRA_PIN_DISABLE>;
403 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
404 };
405 mdm_ap_usb_uart_oe {
406 nvidia,pins = "lcd_vsync_pj4";
407 nvidia,function = "displaya";
408 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
409 nvidia,tristate = <TEGRA_PIN_DISABLE>;
410 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
411 };
412 mcam_spi_di_cs0 {
413 nvidia,pins = "uart2_cts_n_pj5",
414 "uart2_rts_n_pj6";
415 nvidia,function = "spi4";
416 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
417 nvidia,tristate = <TEGRA_PIN_DISABLE>;
418 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
419 };
420 mdm_tx {
421 nvidia,pins = "gmi_a16_pj7";
422 nvidia,function = "uartd";
423 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
424 nvidia,tristate = <TEGRA_PIN_DISABLE>;
425 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
426 };
427
428 /* PORT K */
429 gmi_adv_n {
430 nvidia,pins = "gmi_adv_n_pk0",
431 "gmi_clk_pk1",
432 "gmi_cs2_n_pk3";
433 nvidia,function = "rsvd4";
434 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
435 nvidia,tristate = <TEGRA_PIN_DISABLE>;
436 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
437 };
438 gmi_cs4_n {
439 nvidia,pins = "gmi_cs4_n_pk2";
440 nvidia,function = "rsvd4";
441 nvidia,pull = <TEGRA_PIN_PULL_UP>;
442 nvidia,tristate = <TEGRA_PIN_DISABLE>;
443 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
444 };
445 gmi_cs3_n {
446 nvidia,pins = "gmi_cs3_n_pk4";
447 nvidia,function = "rsvd1";
448 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
449 nvidia,tristate = <TEGRA_PIN_DISABLE>;
450 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
451 };
452 spdif_out {
453 nvidia,pins = "spdif_out_pk5";
454 nvidia,function = "spdif";
455 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
456 nvidia,tristate = <TEGRA_PIN_ENABLE>;
457 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
458 };
459 spdif_in {
460 nvidia,pins = "spdif_in_pk6";
461 nvidia,function = "spdif";
462 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
463 nvidia,tristate = <TEGRA_PIN_ENABLE>;
464 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
465 };
466 mdm_rts {
467 nvidia,pins = "gmi_a19_pk7";
468 nvidia,function = "uartd";
469 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
470 nvidia,tristate = <TEGRA_PIN_DISABLE>;
471 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
472 };
473
474 /* PORT L */
475 port_l {
476 nvidia,pins = "vi_d2_pl0",
477 "vi_d3_pl1",
478 "vi_d4_pl2",
479 "vi_d5_pl3",
480 "vi_d6_pl4",
481 "vi_d7_pl5",
482 "vi_d8_pl6",
483 "vi_d9_pl7";
484 nvidia,function = "sdmmc2";
485 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
486 nvidia,tristate = <TEGRA_PIN_DISABLE>;
487 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
488 };
489
490 /* PORT M */
491 dsp_lcd_id {
492 nvidia,pins = "lcd_d16_pm0",
493 "lcd_d17_pm1";
494 nvidia,function = "displaya";
495 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
496 nvidia,tristate = <TEGRA_PIN_DISABLE>;
497 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
498 };
499 front_cam_rst {
500 nvidia,pins = "lcd_d18_pm2";
501 nvidia,function = "rsvd4";
502 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
503 nvidia,tristate = <TEGRA_PIN_DISABLE>;
504 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
505 };
506 mdm_v_dcin_modem_en {
507 nvidia,pins = "lcd_d19_pm3",
508 "lcd_d20_pm4";
509 nvidia,function = "rsvd4";
510 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
511 nvidia,tristate = <TEGRA_PIN_DISABLE>;
512 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
513 };
514 nfc_pins {
515 nvidia,pins = "lcd_d21_pm5",
516 "lcd_d22_pm6";
517 nvidia,function = "rsvd4";
518 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
519 nvidia,tristate = <TEGRA_PIN_DISABLE>;
520 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
521 };
522 cam_vaa_2v85_en {
523 nvidia,pins = "lcd_d23_pm7";
524 nvidia,function = "rsvd4";
525 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
526 nvidia,tristate = <TEGRA_PIN_DISABLE>;
527 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
528 };
529
530 /* PORT N */
531 mdm_ap2bb_rst_host_pwr {
532 nvidia,pins = "dap1_fs_pn0",
533 "dap1_din_pn1",
534 "dap1_sclk_pn3";
535 nvidia,function = "i2s0";
536 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
537 nvidia,tristate = <TEGRA_PIN_ENABLE>;
538 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
539 };
540 mdm_bb_fatal_int {
541 nvidia,pins = "dap1_dout_pn2";
542 nvidia,function = "i2s0";
543 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
544 nvidia,tristate = <TEGRA_PIN_ENABLE>;
545 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
546 };
547 lcd_cs0_n {
548 nvidia,pins = "lcd_cs0_n_pn4";
549 nvidia,function = "rsvd4";
550 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
551 nvidia,tristate = <TEGRA_PIN_DISABLE>;
552 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
553 };
554 lcd_sdout {
555 nvidia,pins = "lcd_sdout_pn5";
556 nvidia,function = "displaya";
557 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
558 nvidia,tristate = <TEGRA_PIN_DISABLE>;
559 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
560 };
561 dsp_lcd_rst {
562 nvidia,pins = "lcd_dc0_pn6";
563 nvidia,function = "displaya";
564 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
565 nvidia,tristate = <TEGRA_PIN_DISABLE>;
566 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
567 };
568 mhl_hpd {
569 nvidia,pins = "hdmi_int_pn7";
570 nvidia,function = "rsvd1";
571 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
572 nvidia,tristate = <TEGRA_PIN_ENABLE>;
573 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
574 };
575
576 /* PORT O */
577 ap_usb_uart_sel {
578 nvidia,pins = "ulpi_data7_po0";
579 nvidia,function = "spi2";
580 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
581 nvidia,tristate = <TEGRA_PIN_DISABLE>;
582 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
583 };
584 bsp_ap_debug_tx {
585 nvidia,pins = "ulpi_data0_po1";
586 nvidia,function = "uarta";
587 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
588 nvidia,tristate = <TEGRA_PIN_DISABLE>;
589 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
590 };
591 bsp_ap_debug_rx {
592 nvidia,pins = "ulpi_data1_po2";
593 nvidia,function = "uarta";
594 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
595 nvidia,tristate = <TEGRA_PIN_DISABLE>;
596 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
597 };
598 ulpi_data2 {
599 nvidia,pins = "ulpi_data2_po3";
600 nvidia,function = "spi3";
601 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
602 nvidia,tristate = <TEGRA_PIN_DISABLE>;
603 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
604 };
605 con_wifi_irq {
606 nvidia,pins = "ulpi_data3_po4";
607 nvidia,function = "hsi";
608 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
609 nvidia,tristate = <TEGRA_PIN_DISABLE>;
610 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
611 };
612 per_gsensor_int {
613 nvidia,pins = "ulpi_data4_po5";
614 nvidia,function = "ulpi";
615 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
616 nvidia,tristate = <TEGRA_PIN_DISABLE>;
617 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
618 };
619 ulpi_data5_data6 {
620 nvidia,pins = "ulpi_data5_po6",
621 "ulpi_data6_po7";
622 nvidia,function = "ulpi";
623 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
624 nvidia,tristate = <TEGRA_PIN_DISABLE>;
625 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
626 };
627
628 /* PORT P */
629 aud_ap_pcm {
630 nvidia,pins = "dap3_fs_pp0",
631 "dap3_din_pp1",
632 "dap3_dout_pp2",
633 "dap3_sclk_pp3";
634 nvidia,function = "i2s2";
635 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
636 nvidia,tristate = <TEGRA_PIN_DISABLE>;
637 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
638 };
639 aud_btpcm {
640 nvidia,pins = "dap4_fs_pp4",
641 "dap4_din_pp5";
642 nvidia,function = "i2s3";
643 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
644 nvidia,tristate = <TEGRA_PIN_DISABLE>;
645 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
646 };
647 aud_ext {
648 nvidia,pins = "dap4_dout_pp6",
649 "dap4_sclk_pp7";
650 nvidia,function = "rsvd4";
651 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
652 nvidia,tristate = <TEGRA_PIN_DISABLE>;
653 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
654 };
655
656 /* PORT Q */
657 port_q {
658 nvidia,pins = "kb_col0_pq0",
659 "kb_col1_pq1",
660 "kb_col2_pq2",
661 "kb_col3_pq3",
662 "kb_col4_pq4",
663 "kb_col5_pq5",
664 "kb_col6_pq6",
665 "kb_col7_pq7";
666 nvidia,function = "kbc";
667 nvidia,pull = <TEGRA_PIN_PULL_UP>;
668 nvidia,tristate = <TEGRA_PIN_DISABLE>;
669 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
670 };
671
672 /* PORT R */
673 raw_intr0 {
674 nvidia,pins = "kb_row0_pr0";
675 nvidia,function = "kbc";
676 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
677 nvidia,tristate = <TEGRA_PIN_ENABLE>;
678 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
679 };
680 per_torch_en {
681 nvidia,pins = "kb_row1_pr1";
682 nvidia,function = "kbc";
683 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
684 nvidia,tristate = <TEGRA_PIN_DISABLE>;
685 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
686 };
687 gyro_pwr {
688 nvidia,pins = "kb_row2_pr2";
689 nvidia,function = "rsvd4";
690 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
691 nvidia,tristate = <TEGRA_PIN_DISABLE>;
692 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
693 };
694 haptic_en {
695 nvidia,pins = "kb_row3_pr3";
696 nvidia,function = "rsvd3";
697 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
698 nvidia,tristate = <TEGRA_PIN_DISABLE>;
699 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
700 };
701 kb_row4_row5 {
702 nvidia,pins = "kb_row4_pr4",
703 "kb_row5_pr5";
704 nvidia,function = "rsvd4";
705 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
706 nvidia,tristate = <TEGRA_PIN_DISABLE>;
707 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
708 };
709 cam_id {
710 nvidia,pins = "kb_row6_pr6",
711 "kb_row7_pr7";
712 nvidia,function = "kbc";
713 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
714 nvidia,tristate = <TEGRA_PIN_ENABLE>;
715 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
716 };
717
718 /* PORT S */
719 dsp_vol_up {
720 nvidia,pins = "kb_row8_ps0";
721 nvidia,function = "kbc";
722 nvidia,pull = <TEGRA_PIN_PULL_UP>;
723 nvidia,tristate = <TEGRA_PIN_DISABLE>;
724 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
725 };
726 con_usb_id_1 {
727 nvidia,pins = "kb_row9_ps1",
728 "kb_row10_ps2";
729 nvidia,function = "kbc";
730 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
731 nvidia,tristate = <TEGRA_PIN_DISABLE>;
732 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
733 };
734 port_s {
735 nvidia,pins = "kb_row11_ps3",
736 "kb_row12_ps4",
737 "kb_row13_ps5",
738 "kb_row14_ps6",
739 "kb_row15_ps7";
740 nvidia,function = "kbc";
741 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
742 nvidia,tristate = <TEGRA_PIN_DISABLE>;
743 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
744 };
745
746 /* PORT T */
747 dsp_tw_i2c {
748 nvidia,pins = "gen2_i2c_scl_pt5",
749 "gen2_i2c_sda_pt6";
750 nvidia,function = "i2c2";
751 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
752 nvidia,tristate = <TEGRA_PIN_DISABLE>;
753 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
754 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
755 };
756 per_emmc_cmd {
757 nvidia,pins = "sdmmc4_cmd_pt7";
758 nvidia,function = "sdmmc4";
759 nvidia,pull = <TEGRA_PIN_PULL_UP>;
760 nvidia,tristate = <TEGRA_PIN_DISABLE>;
761 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
762 };
763
764 /* PORT U */
765 con_bt_en {
766 nvidia,pins = "pu0", "pu1", "pu2",
767 "pu3", "pu4";
768 nvidia,function = "rsvd4";
769 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
770 nvidia,tristate = <TEGRA_PIN_DISABLE>;
771 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
772 };
773 per_capsensor_int_cpu {
774 nvidia,pins = "pu5";
775 nvidia,function = "rsvd4";
776 nvidia,pull = <TEGRA_PIN_PULL_UP>;
777 nvidia,tristate = <TEGRA_PIN_DISABLE>;
778 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
779 };
780 dsp_ap_kpdpwr {
781 nvidia,pins = "pu6";
782 nvidia,function = "pwm3";
783 nvidia,pull = <TEGRA_PIN_PULL_UP>;
784 nvidia,tristate = <TEGRA_PIN_ENABLE>;
785 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
786 };
787 jtag_rtck {
788 nvidia,pins = "jtag_rtck_pu7";
789 nvidia,function = "rtck";
790 nvidia,pull = <TEGRA_PIN_PULL_UP>;
791 nvidia,tristate = <TEGRA_PIN_DISABLE>;
792 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
793 };
794
795 /* PORT V */
796 mdm_bb2ap_suspend_req {
797 nvidia,pins = "pv0";
798 nvidia,function = "rsvd1";
799 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
800 nvidia,tristate = <TEGRA_PIN_DISABLE>;
801 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
802 };
803 dsp_tp_att {
804 nvidia,pins = "pv1";
805 nvidia,function = "rsvd1";
806 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
807 nvidia,tristate = <TEGRA_PIN_DISABLE>;
808 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
809 };
810 con_wifi_en {
811 nvidia,pins = "pv2", "pv3";
812 nvidia,function = "rsvd2";
813 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
814 nvidia,tristate = <TEGRA_PIN_DISABLE>;
815 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
816 };
817 mhl_ddc {
818 nvidia,pins = "ddc_scl_pv4",
819 "ddc_sda_pv5";
820 nvidia,function = "i2c4";
821 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
822 nvidia,tristate = <TEGRA_PIN_DISABLE>;
823 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
824 };
825 crt_hsync {
826 nvidia,pins = "crt_hsync_pv6";
827 nvidia,function = "crt";
828 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
829 nvidia,tristate = <TEGRA_PIN_DISABLE>;
830 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
831 };
832 crt_vsync {
833 nvidia,pins = "crt_vsync_pv7";
834 nvidia,function = "rsvd4";
835 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
836 nvidia,tristate = <TEGRA_PIN_DISABLE>;
837 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
838 };
839
840 /* PORT W */
841 pwr_chg_stat {
842 nvidia,pins = "lcd_cs1_n_pw0";
843 nvidia,function = "rsvd4";
844 nvidia,pull = <TEGRA_PIN_PULL_UP>;
845 nvidia,tristate = <TEGRA_PIN_DISABLE>;
846 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
847 };
848 dsp_bl_pwm_cpu {
849 nvidia,pins = "lcd_m1_pw1";
850 nvidia,function = "displaya";
851 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
852 nvidia,tristate = <TEGRA_PIN_DISABLE>;
853 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
854 };
855 aud_hp_det {
856 nvidia,pins = "spi2_cs1_n_pw2";
857 nvidia,function = "spi2";
858 nvidia,pull = <TEGRA_PIN_PULL_UP>;
859 nvidia,tristate = <TEGRA_PIN_DISABLE>;
860 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
861 };
862 dsp_vol_down {
863 nvidia,pins = "spi2_cs2_n_pw3";
864 nvidia,function = "spi2";
865 nvidia,pull = <TEGRA_PIN_PULL_UP>;
866 nvidia,tristate = <TEGRA_PIN_ENABLE>;
867 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
868 };
869 aud_mclk {
870 nvidia,pins = "clk1_out_pw4";
871 nvidia,function = "rsvd4";
872 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
873 nvidia,tristate = <TEGRA_PIN_DISABLE>;
874 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
875 };
876 aud_aic3008_rst {
877 nvidia,pins = "clk2_out_pw5";
878 nvidia,function = "rsvd4";
879 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
880 nvidia,tristate = <TEGRA_PIN_DISABLE>;
881 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
882 };
883 con_bt_tx {
884 nvidia,pins = "uart3_txd_pw6";
885 nvidia,function = "uartc";
886 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
887 nvidia,tristate = <TEGRA_PIN_DISABLE>;
888 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
889 };
890 con_bt_rx {
891 nvidia,pins = "uart3_rxd_pw7";
892 nvidia,function = "uartc";
893 nvidia,pull = <TEGRA_PIN_PULL_UP>;
894 nvidia,tristate = <TEGRA_PIN_DISABLE>;
895 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
896 };
897
898 /* PORT X */
899 aud_spi_do {
900 nvidia,pins = "spi2_mosi_px0",
901 "spi2_sck_px2",
902 "spi2_cs0_n_px3";
903 nvidia,function = "spi2";
904 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
905 nvidia,tristate = <TEGRA_PIN_DISABLE>;
906 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
907 };
908 aud_spi_di {
909 nvidia,pins = "spi2_miso_px1";
910 nvidia,function = "spi2";
911 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
912 nvidia,tristate = <TEGRA_PIN_DISABLE>;
913 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
914 };
915 spi1_mosi {
916 nvidia,pins = "spi1_mosi_px4";
917 nvidia,function = "spi1";
918 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
919 nvidia,tristate = <TEGRA_PIN_DISABLE>;
920 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
921 };
922 pwr_chg_int {
923 nvidia,pins = "spi1_sck_px5";
924 nvidia,function = "spi2";
925 nvidia,pull = <TEGRA_PIN_PULL_UP>;
926 nvidia,tristate = <TEGRA_PIN_DISABLE>;
927 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
928 };
929 spi1_cs0_n {
930 nvidia,pins = "spi1_cs0_n_px6";
931 nvidia,function = "spi1";
932 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
933 nvidia,tristate = <TEGRA_PIN_DISABLE>;
934 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
935 };
936 audio_mclk_en {
937 nvidia,pins = "spi1_miso_px7";
938 nvidia,function = "rsvd4";
939 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
940 nvidia,tristate = <TEGRA_PIN_DISABLE>;
941 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
942 };
943
944 /* PORT Y */
945 led_drv_en_trig {
946 nvidia,pins = "ulpi_clk_py0",
947 "ulpi_dir_py1";
948 nvidia,function = "rsvd2";
949 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
950 nvidia,tristate = <TEGRA_PIN_DISABLE>;
951 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
952 };
953 mhl_3v3_en {
954 nvidia,pins = "ulpi_nxt_py2";
955 nvidia,function = "ulpi";
956 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
957 nvidia,tristate = <TEGRA_PIN_DISABLE>;
958 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
959 };
960 peh_v_srio_1v8_en {
961 nvidia,pins = "ulpi_stp_py3";
962 nvidia,function = "ulpi";
963 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
964 nvidia,tristate = <TEGRA_PIN_DISABLE>;
965 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
966 };
967 aud_remo_tx {
968 nvidia,pins = "sdmmc1_dat3_py4";
969 nvidia,function = "uarte";
970 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
971 nvidia,tristate = <TEGRA_PIN_DISABLE>;
972 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
973 };
974 aud_remo_rx {
975 nvidia,pins = "sdmmc1_dat2_py5";
976 nvidia,function = "uarte";
977 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
978 nvidia,tristate = <TEGRA_PIN_DISABLE>;
979 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
980 };
981 nfc_irq {
982 nvidia,pins = "sdmmc1_dat1_py6";
983 nvidia,function = "rsvd2";
984 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
985 nvidia,tristate = <TEGRA_PIN_ENABLE>;
986 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
987 };
988 testpoint1 {
989 nvidia,pins = "sdmmc1_dat0_py7";
990 nvidia,function = "sdmmc1";
991 nvidia,pull = <TEGRA_PIN_PULL_UP>;
992 nvidia,tristate = <TEGRA_PIN_DISABLE>;
993 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
994 };
995
996 /* PORT Z */
997 aud_remo_oe {
998 nvidia,pins = "sdmmc1_clk_pz0";
999 nvidia,function = "sdmmc1";
1000 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1001 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1002 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1003 };
1004 testpoint2 {
1005 nvidia,pins = "sdmmc1_cmd_pz1";
1006 nvidia,function = "sdmmc1";
1007 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1008 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1009 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1010 };
1011 mdm_usb_uart_oe {
1012 nvidia,pins = "lcd_sdin_pz2";
1013 nvidia,function = "displaya";
1014 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1015 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1016 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1017 };
1018 lcd_wr_n {
1019 nvidia,pins = "lcd_wr_n_pz3";
1020 nvidia,function = "displaya";
1021 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1022 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1023 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1024 };
1025 lcd_sck {
1026 nvidia,pins = "lcd_sck_pz4";
1027 nvidia,function = "displaya";
1028 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1029 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1030 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1031 };
1032 sys_clk_req {
1033 nvidia,pins = "sys_clk_req_pz5";
1034 nvidia,function = "sysclk";
1035 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1036 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1037 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1038 };
1039 sys_pwr_i2c {
1040 nvidia,pins = "pwr_i2c_scl_pz6",
1041 "pwr_i2c_sda_pz7";
1042 nvidia,function = "i2cpwr";
1043 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1044 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1045 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1046 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1047 };
1048
1049 /* PORT AA */
1050 bsp_emmc {
1051 nvidia,pins = "sdmmc4_dat0_paa0",
1052 "sdmmc4_dat1_paa1",
1053 "sdmmc4_dat2_paa2",
1054 "sdmmc4_dat3_paa3",
1055 "sdmmc4_dat4_paa4",
1056 "sdmmc4_dat5_paa5",
1057 "sdmmc4_dat6_paa6",
1058 "sdmmc4_dat7_paa7";
1059 nvidia,function = "sdmmc4";
1060 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1061 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1062 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1063 };
1064
1065 /* PORT BB */
1066 cam1_rst {
1067 nvidia,pins = "pbb0";
1068 nvidia,function = "rsvd3";
1069 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1070 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1071 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1072 };
1073 cam_i2c {
1074 nvidia,pins = "cam_i2c_scl_pbb1",
1075 "cam_i2c_sda_pbb2";
1076 nvidia,function = "i2c3";
1077 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1078 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1079 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1080 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1081 };
1082 per_flash_en {
1083 nvidia,pins = "pbb3";
1084 nvidia,function = "vgp3";
1085 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1086 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1087 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1088 };
1089 cam_vddio_1v8_en {
1090 nvidia,pins = "pbb4";
1091 nvidia,function = "vgp4";
1092 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1093 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1094 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1095 };
1096 cam1_vcm_pd {
1097 nvidia,pins = "pbb5";
1098 nvidia,function = "vgp5";
1099 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1100 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1101 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1102 };
1103 aud_remo_pres {
1104 nvidia,pins = "pbb6";
1105 nvidia,function = "vgp6";
1106 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1107 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1108 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1109 };
1110 front_cam_standby {
1111 nvidia,pins = "pbb7";
1112 nvidia,function = "rsvd3";
1113 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1114 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1115 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1116 };
1117
1118 /* PORT CC */
1119 cam_mclk {
1120 nvidia,pins = "cam_mclk_pcc0";
1121 nvidia,function = "vi_alt3";
1122 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1123 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1124 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1125 };
1126 cam_sel {
1127 nvidia,pins = "pcc1";
1128 nvidia,function = "rsvd3";
1129 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1130 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1131 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1132 };
1133 pwr_themp_alert_int {
1134 nvidia,pins = "pcc2";
1135 nvidia,function = "rsvd3";
1136 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1137 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1138 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1139 };
1140 bsp_emmc_resout {
1141 nvidia,pins = "sdmmc4_rst_n_pcc3";
1142 nvidia,function = "rsvd2";
1143 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1144 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1145 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1146 };
1147 bsp_emmc_clk {
1148 nvidia,pins = "sdmmc4_clk_pcc4";
1149 nvidia,function = "sdmmc4";
1150 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1151 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1152 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1153 };
1154 aud_dock_out_en {
1155 nvidia,pins = "clk2_req_pcc5";
1156 nvidia,function = "rsvd4";
1157 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1158 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1159 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1160 };
1161
1162 /* PORT DD */
1163 /* PORT EE */
1164 clk3_out {
1165 nvidia,pins = "clk3_out_pee0";
1166 nvidia,function = "extperiph3";
1167 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1168 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1169 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1170 };
1171 raw_intr1 {
1172 nvidia,pins = "clk3_req_pee1";
1173 nvidia,function = "rsvd4";
1174 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1175 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1176 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1177 };
1178 clk1_req {
1179 nvidia,pins = "clk1_req_pee2";
1180 nvidia,function = "dap";
1181 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1182 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1183 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1184 };
1185 hdmi_cec {
1186 nvidia,pins = "hdmi_cec_pee3";
1187 nvidia,function = "cec";
1188 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1189 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1190 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1191 };
1192 owr {
1193 nvidia,pins = "owr";
1194 nvidia,function = "owr";
1195 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1196 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1197 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1198 };
1199 };
1200 };
1201
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1202 uarta: serial@70006000 {
1203 status = "okay";
1204 };
1205
1206 pwr_i2c: i2c@7000d000 {
1207 status = "okay";
1208 clock-frequency = <100000>;
1209
1210 /* Texas Instruments TPS80032 PMIC */
1211 pmic: tps80032@48 {
1212 compatible = "ti,tps80032";
1213 reg = <0x48>;
1214
Svyatoslav Ryheld27e0012023-10-03 09:36:39 +0300[diff] [blame]1215 ti,system-power-controller;
1216
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1217 regulators {
Svyatoslav Ryheld27e0012023-10-03 09:36:39 +0300[diff] [blame]1218 vdd_1v8_vio: smps5 {
1219 regulator-name = "vdd_1v8_gen";
1220 regulator-min-microvolt = <1800000>;
1221 regulator-max-microvolt = <1800000>;
1222 regulator-always-on;
1223 regulator-boot-on;
1224 };
1225
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1226 /* DSI VDD */
1227 avdd_dsi_csi: ldo1 {
1228 regulator-name = "avdd_dsi_csi";
1229 regulator-min-microvolt = <1200000>;
1230 regulator-max-microvolt = <1200000>;
Svyatoslav Ryhel8c8fb852023-08-26 18:35:35 +0300[diff] [blame]1231 regulator-boot-on;
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1232 };
1233 };
1234 };
1235 };
1236
1237 sdmmc4: sdhci@78000600 {
1238 status = "okay";
1239 bus-width = <8>;
1240 non-removable;
Svyatoslav Ryheld27e0012023-10-03 09:36:39 +0300[diff] [blame]1241
1242 vmmc-supply = <&vcore_emmc>;
1243 vqmmc-supply = <&vdd_1v8_vio>;
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1244 };
1245
1246 micro_usb: usb@7d000000 {
1247 status = "okay";
1248 dr_mode = "otg";
1249 };
1250
Svyatoslav Ryhel6c438612023-08-25 20:23:14 +0300[diff] [blame]1251 usb-phy@7d000000 {
1252 status = "okay";
1253 nvidia,hssync-start-delay = <0>;
1254 nvidia,xcvr-lsfslew = <2>;
1255 nvidia,xcvr-lsrslew = <2>;
1256 };
1257
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1258 backlight: backlight {
1259 compatible = "nvidia,tegra-pwm-backlight";
1260
1261 nvidia,pwm-source = <1>;
1262 nvidia,default-brightness = <0x8E>;
1263 };
1264
1265 /* PMIC has a built-in 32KHz oscillator which is used by PMC */
1266 clk32k_in: clock-32k {
1267 compatible = "fixed-clock";
1268 #clock-cells = <0>;
1269 clock-frequency = <32768>;
1270 clock-output-names = "pmic-oscillator";
1271 };
1272
1273 gpio-keys {
1274 compatible = "gpio-keys";
1275
1276 key-power {
1277 label = "Power";
1278 gpios = <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_LOW>;
1279 linux,code = <KEY_ENTER>;
1280 };
1281
1282 key-volume-up {
1283 label = "Volume Up";
1284 gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
1285 linux,code = <KEY_UP>;
1286 };
1287
1288 key-volume-down {
1289 label = "Volume Down";
1290 gpios = <&gpio TEGRA_GPIO(W, 3) GPIO_ACTIVE_LOW>;
1291 linux,code = <KEY_DOWN>;
1292 };
1293 };
1294
1295 panel: panel {
1296 compatible = "htc,edge-panel";
1297
1298 reset-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
1299
1300 vdd-supply = <&vdd_3v3_panel>;
1301 vddio-supply = <&vdd_1v8_panel>;
1302
1303 backlight = <&backlight>;
1304 };
1305
1306 vcore_emmc: regulator-emmc {
1307 compatible = "regulator-fixed";
1308 regulator-name = "vdd_2v85_sdmmc";
1309 regulator-min-microvolt = <2850000>;
1310 regulator-max-microvolt = <2850000>;
1311 gpio = <&gpio TEGRA_GPIO(M, 3) GPIO_ACTIVE_HIGH>;
1312 enable-active-high;
1313 };
1314
1315 vdd_3v3_panel: regulator-lcm {
1316 compatible = "regulator-fixed";
1317 regulator-name = "v_lcm_3v3";
1318 regulator-min-microvolt = <3300000>;
1319 regulator-max-microvolt = <3300000>;
1320 gpio = <&gpio TEGRA_GPIO(E, 2) GPIO_ACTIVE_HIGH>;
1321 enable-active-high;
1322 };
1323
1324 vdd_1v8_panel: regulator-lcmio {
1325 compatible = "regulator-fixed";
1326 regulator-name = "v_lcmio_1v8";
1327 regulator-min-microvolt = <1800000>;
1328 regulator-max-microvolt = <1800000>;
1329 gpio = <&gpio TEGRA_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
1330 enable-active-high;
1331 };
1332};