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git01.mediatek.com / filogic / uboot / 29d3b0cc86aec6e0d3eafd22633b463c19315f9f / . / drivers / pci / pcie_layerscape_fixup_common.h
blob: 70bd3f0cba31f248c91c68d3c6c9e33b78b0ae17 [file] [log] [blame]
Wasim Khan54e44ef2020-01-06 12:05:57 +0000[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2019-2020 NXP
4 *
5 * PCIe DT fixup for NXP Layerscape SoCs
6 * Author: Wasim Khan <wasim.khan@nxp.com>
7 *
8 */
9#ifndef _PCIE_LAYERSCAPE_FIXUP_COMMON_H_
10#define _PCIE_LAYERSCAPE_FIXUP_COMMON_H_
11
12#include <common.h>
13
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900[diff] [blame]14void ft_pci_setup_ls(void *blob, struct bd_info *bd);
Wasim Khan54e44ef2020-01-06 12:05:57 +0000[diff] [blame]15
16#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900[diff] [blame]17void ft_pci_setup_ls_gen4(void *blob, struct bd_info *bd);
Wasim Khan54e44ef2020-01-06 12:05:57 +0000[diff] [blame]18#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
Wasim Khan9d3d2302020-01-06 12:05:59 +0000[diff] [blame]19int pcie_next_streamid(int currentid, int id);
Wasim Khan70bec5c2020-01-06 12:06:00 +0000[diff] [blame]20int pcie_board_fix_fdt(void *fdt);
Wasim Khan54e44ef2020-01-06 12:05:57 +0000[diff] [blame]21
22#endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_