blob: 7d66ba726b91c4699a60968af9bfb1e80ffbe4d5 [file] [log] [blame]
Mario Six94867102019-01-21 09:17:54 +01001#ifdef CONFIG_ARCH_MPC8349
2#define TSEC1_MODE_SHIFT 17
3#define TSEC2_MODE_SHIFT 19
4#else
5#define TSEC1_MODE_SHIFT 18
6#define TSEC2_MODE_SHIFT 21
7#endif
8
9#define CONFIG_SYS_HRCW_LOW (\
10 (CONFIG_LBMC_CLOCK_MODE << (31 - 0)) |\
11 (CONFIG_DDR_MC_CLOCK_MODE << (31 - 1)) |\
12 (CONFIG_SYSTEM_PLL_VCO_DIV << (31 - 3)) |\
13 (CONFIG_SYSTEM_PLL_FACTOR << (31 - 7)) |\
14 (CONFIG_CORE_PLL_RATIO << (31 - 15)) |\
15 (CONFIG_QUICC_VCO_DIVIDER << (31 - 25)) |\
16 (CONFIG_QUICC_DIV_FACTOR << (31 - 26)) |\
17 (CONFIG_QUICC_MULT_FACTOR << (31 - 31)) \
18 )
19
20#define CONFIG_SYS_HRCW_HIGH (\
21 (CONFIG_PCI_HOST_MODE << (31 - 0)) |\
22 (CONFIG_PCI_64BIT_MODE << (31 - 1)) |\
23 (CONFIG_PCI_INT_ARBITER1 << (31 - 2)) |\
24 (CONFIG_PCI_INT_ARBITER2 << (31 - 3)) |\
25 (CONFIG_PCI_CLOCK_OUTPUT_DRIVE << (31 - 3)) |\
26 (CONFIG_CORE_DISABLE_MODE << (31 - 4)) |\
27 (CONFIG_BOOT_MEMORY_SPACE << (31 - 5)) |\
28 (CONFIG_BOOT_SEQUENCER << (31 - 7)) |\
29 (CONFIG_SOFTWARE_WATCHDOG << (31 - 8)) |\
30 (CONFIG_BOOT_ROM_INTERFACE << (31 - 13)) |\
31 (CONFIG_TSEC1_MODE << (31 - TSEC1_MODE_SHIFT)) |\
32 (CONFIG_TSEC2_MODE << (31 - TSEC2_MODE_SHIFT)) |\
33 (CONFIG_SECONDARY_DDR_IO << (31 - 27)) |\
34 (CONFIG_TRUE_LITTLE_ENDIAN << (31 - 28)) |\
35 (CONFIG_LALE_TIMING << (31 - 29)) |\
36 (CONFIG_LDP_PIN_MUX_STATE << (31 - 30)) \
37 )