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Hao Zhangeb01de22014-07-09 23:44:48 +03001/*
2 * Common configuration header file for all Keystone II EVM platforms
3 *
4 * (C) Copyright 2012-2014
5 * Texas Instruments Incorporated, <www.ti.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_KS2_EVM_H
11#define __CONFIG_KS2_EVM_H
12
13#define CONFIG_SOC_KEYSTONE
14
15/* U-Boot Build Configuration */
16#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
Hao Zhangeb01de22014-07-09 23:44:48 +030017#define CONFIG_BOARD_EARLY_INIT_F
Lokesh Vutla16451062015-07-28 14:16:42 +053018#define CONFIG_DISPLAY_CPUINFO
Hao Zhangeb01de22014-07-09 23:44:48 +030019
20/* SoC Configuration */
Hao Zhangeb01de22014-07-09 23:44:48 +030021#define CONFIG_ARCH_CPU_INIT
22#define CONFIG_SYS_ARCH_TIMER
Lokesh Vutla736bb5a2015-08-17 19:54:48 +053023#define CONFIG_SYS_TEXT_BASE 0x0c000000
Hao Zhangeb01de22014-07-09 23:44:48 +030024#define CONFIG_SPL_TARGET "u-boot-spi.gph"
25#define CONFIG_SYS_DCACHE_OFF
26
27/* Memory Configuration */
28#define CONFIG_NR_DRAM_BANKS 2
Hao Zhangeb01de22014-07-09 23:44:48 +030029#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
30#define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
31#define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */
Lokesh Vutla736bb5a2015-08-17 19:54:48 +053032#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE - \
Hao Zhangeb01de22014-07-09 23:44:48 +030033 GENERATED_GBL_DATA_SIZE)
34
Lokesh Vutlae0208612015-09-19 15:00:17 +053035#ifdef CONFIG_SYS_MALLOC_F_LEN
36#define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN
37#else
38#define SPL_MALLOC_F_SIZE 0
39#endif
40
Hao Zhangeb01de22014-07-09 23:44:48 +030041/* SPL SPI Loader Configuration */
42#define CONFIG_SPL_PAD_TO 65536
43#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
44#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
45 CONFIG_SPL_MAX_SIZE)
46#define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
47#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
48 CONFIG_SPL_BSS_MAX_SIZE)
49#define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024)
50#define CONFIG_SPL_STACK_SIZE (8 * 1024)
51#define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \
52 CONFIG_SYS_SPL_MALLOC_SIZE + \
Lokesh Vutlae0208612015-09-19 15:00:17 +053053 SPL_MALLOC_F_SIZE + \
Hao Zhangeb01de22014-07-09 23:44:48 +030054 CONFIG_SPL_STACK_SIZE - 4)
Hao Zhangeb01de22014-07-09 23:44:48 +030055#define CONFIG_SPL_SPI_FLASH_SUPPORT
56#define CONFIG_SPL_SPI_SUPPORT
Hao Zhangeb01de22014-07-09 23:44:48 +030057#define CONFIG_SPL_SPI_LOAD
Hao Zhangeb01de22014-07-09 23:44:48 +030058#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
Hao Zhangeb01de22014-07-09 23:44:48 +030059
60/* UART Configuration */
Hao Zhangeb01de22014-07-09 23:44:48 +030061#define CONFIG_SYS_NS16550_MEM32
Lokesh Vutla050d8ab2015-09-19 15:00:20 +053062#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
63#define CONFIG_SYS_NS16550_SERIAL
Hao Zhangeb01de22014-07-09 23:44:48 +030064#define CONFIG_SYS_NS16550_REG_SIZE -4
Lokesh Vutla050d8ab2015-09-19 15:00:20 +053065#endif
Hao Zhangeb01de22014-07-09 23:44:48 +030066#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
67#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
Hao Zhangeb01de22014-07-09 23:44:48 +030068#define CONFIG_CONS_INDEX 1
Hao Zhangeb01de22014-07-09 23:44:48 +030069
Vitaly Andrianov7fd5b642015-09-19 16:26:41 +053070#ifndef CONFIG_SOC_K2G
71#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
72#else
73#define CONFIG_SYS_NS16550_CLK clk_get_rate(uart_pll_clk) / 2
74#endif
75
Hao Zhangeb01de22014-07-09 23:44:48 +030076/* SPI Configuration */
Hao Zhangeb01de22014-07-09 23:44:48 +030077#define CONFIG_DAVINCI_SPI
Hao Zhang0ecd31e2014-07-16 00:59:23 +030078#define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_CLK1_6)
Hao Zhangeb01de22014-07-09 23:44:48 +030079#define CONFIG_SF_DEFAULT_SPEED 30000000
80#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
81#define CONFIG_SYS_SPI0
82#define CONFIG_SYS_SPI_BASE KS2_SPI0_BASE
83#define CONFIG_SYS_SPI0_NUM_CS 4
84#define CONFIG_SYS_SPI1
85#define CONFIG_SYS_SPI1_BASE KS2_SPI1_BASE
86#define CONFIG_SYS_SPI1_NUM_CS 4
87#define CONFIG_SYS_SPI2
88#define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE
89#define CONFIG_SYS_SPI2_NUM_CS 4
90
91/* Network Configuration */
Khoronzhuk, Ivan39cd9f02014-10-17 20:44:35 +030092#define CONFIG_PHYLIB
93#define CONFIG_PHY_MARVELL
Hao Zhangeb01de22014-07-09 23:44:48 +030094#define CONFIG_MII
95#define CONFIG_BOOTP_DEFAULT
96#define CONFIG_BOOTP_DNS
97#define CONFIG_BOOTP_DNS2
98#define CONFIG_BOOTP_SEND_HOSTNAME
99#define CONFIG_NET_RETRY_COUNT 32
Hao Zhangeb01de22014-07-09 23:44:48 +0300100#define CONFIG_SYS_SGMII_REFCLK_MHZ 312
101#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
102#define CONFIG_SYS_SGMII_RATESCALE 2
103
Khoronzhuk, Ivan7954b862014-09-05 19:02:47 +0300104/* Keyston Navigator Configuration */
Hao Zhang7874b8a2014-10-29 13:09:34 +0200105#define CONFIG_TI_KSNAV
Khoronzhuk, Ivan7954b862014-09-05 19:02:47 +0300106#define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS
107#define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE
108#define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE
109#define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE
110#define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE
111#define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE
112#define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE
113#define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE
114#define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE
115#define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE
116#define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE
117#define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE
118#define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM
119#define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM
120
121/* NETCP pktdma */
Hao Zhang7874b8a2014-10-29 13:09:34 +0200122#define CONFIG_KSNAV_PKTDMA_NETCP
Khoronzhuk, Ivan7954b862014-09-05 19:02:47 +0300123#define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE
124#define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE
125#define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM
126#define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE
127#define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM
128#define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE
129#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE
130#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM
131#define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE
132#define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE
133#define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE
134
Khoronzhuk, Ivanf2c13ba2014-09-29 22:17:22 +0300135/* Keystone net */
Hao Zhang7874b8a2014-10-29 13:09:34 +0200136#define CONFIG_DRIVER_TI_KEYSTONE_NET
Hao Zhangd890dff2014-10-22 17:18:23 +0300137#define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR
138#define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE
139#define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE
Khoronzhuk, Ivan3df3e632014-10-17 21:01:13 +0300140#define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
Hao Zhangd890dff2014-10-22 17:18:23 +0300141#define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
Khoronzhuk, Ivanf2c13ba2014-09-29 22:17:22 +0300142
Khoronzhuk, Ivan53eae4a2014-10-29 13:09:32 +0200143/* SerDes */
144#define CONFIG_TI_KEYSTONE_SERDES
145
Hao Zhangeb01de22014-07-09 23:44:48 +0300146/* AEMIF */
147#define CONFIG_TI_AEMIF
148#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
149
150/* I2C Configuration */
Hao Zhangeb01de22014-07-09 23:44:48 +0300151#define CONFIG_SYS_I2C_DAVINCI
152#define CONFIG_SYS_DAVINCI_I2C_SPEED 100000
153#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
154#define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000
155#define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */
156#define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000
157#define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
158#define I2C_BUS_MAX 3
159
160/* EEPROM definitions */
Hao Zhangeb01de22014-07-09 23:44:48 +0300161#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
162#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
163#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
164#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
165#define CONFIG_ENV_EEPROM_IS_ON_I2C
166
167/* NAND Configuration */
168#define CONFIG_NAND_DAVINCI
169#define CONFIG_KEYSTONE_RBL_NAND
170#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET
171#define CONFIG_SYS_NAND_MASK_CLE 0x4000
172#define CONFIG_SYS_NAND_MASK_ALE 0x2000
173#define CONFIG_SYS_NAND_CS 2
174#define CONFIG_SYS_NAND_USE_FLASH_BBT
175#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
176
177#define CONFIG_SYS_NAND_LARGEPAGE
178#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
179#define CONFIG_SYS_MAX_NAND_DEVICE 1
180#define CONFIG_SYS_NAND_MAX_CHIPS 1
181#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
182#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
183#define CONFIG_ENV_IS_IN_NAND
184#define CONFIG_ENV_OFFSET 0x100000
185#define CONFIG_MTD_PARTITIONS
Hao Zhangeb01de22014-07-09 23:44:48 +0300186#define CONFIG_RBTREE
187#define CONFIG_LZO
188#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
189#define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
190 "1024k(bootloader)ro,512k(params)ro," \
191 "-(ubifs)"
192
WingMan Kwok66c5b9f2014-09-05 22:26:23 +0300193/* USB Configuration */
194#define CONFIG_USB_XHCI
Ramneek Mehreshd1fbfbd2015-05-29 14:47:18 +0530195#define CONFIG_USB_XHCI_DWC3
WingMan Kwok66c5b9f2014-09-05 22:26:23 +0300196#define CONFIG_USB_XHCI_KEYSTONE
197#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
Mugunthan V N3ebc8452016-03-09 15:39:30 +0530198#define CONFIG_USB_STORAGE
WingMan Kwok66c5b9f2014-09-05 22:26:23 +0300199#define CONFIG_EFI_PARTITION
200#define CONFIG_FS_FAT
201#define CONFIG_SYS_CACHELINE_SIZE 64
202#define CONFIG_USB_SS_BASE KS2_USB_SS_BASE
203#define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE
204#define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE
205#define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE
206
Hao Zhangeb01de22014-07-09 23:44:48 +0300207/* U-Boot command configuration */
Hao Zhangeb01de22014-07-09 23:44:48 +0300208#define CONFIG_CMD_DHCP
Hao Zhangeb01de22014-07-09 23:44:48 +0300209#define CONFIG_CMD_PING
210#define CONFIG_CMD_SAVES
Hao Zhangeb01de22014-07-09 23:44:48 +0300211#define CONFIG_CMD_NAND
212#define CONFIG_CMD_UBI
213#define CONFIG_CMD_UBIFS
214#define CONFIG_CMD_SF
215#define CONFIG_CMD_EEPROM
WingMan Kwok66c5b9f2014-09-05 22:26:23 +0300216#define CONFIG_CMD_USB
Hao Zhangeb01de22014-07-09 23:44:48 +0300217
218/* U-Boot general configuration */
Khoronzhuk, Ivand0553052014-09-26 15:42:30 +0300219#define CONFIG_MISC_INIT_R
Hao Zhangeb01de22014-07-09 23:44:48 +0300220#define CONFIG_CRC32_VERIFY
221#define CONFIG_MX_CYCLIC
Hao Zhangeb01de22014-07-09 23:44:48 +0300222#define CONFIG_TIMESTAMP
223
224/* EDMA3 */
225#define CONFIG_TI_EDMA3
226
Murali Karichericead0b22016-03-09 15:39:38 +0530227#define DEFAULT_FW_INITRAMFS_BOOT_ENV \
228 "name_fw_rd=k2-fw-initrd.cpio.gz\0" \
229 "set_rd_spec=setenv rd_spec ${rdaddr}:${filesize}\0" \
230 "init_fw_rd_net=dhcp ${rdaddr} ${tftp_root}/${name_fw_rd}; " \
231 "run set_rd_spec\0" \
232 "init_fw_rd_ramfs=setenv rd_spec -\0" \
233 "init_fw_rd_ubi=ubifsload ${rdaddr} ${bootdir}/${name_fw_rd}; " \
234 "run set_rd_spec\0" \
235
Nishanth Menon0ce0a252016-02-25 12:53:47 -0600236#define DEFAULT_PMMC_BOOT_ENV \
237 "set_name_pmmc=setenv name_pmmc ti-sci-firmware-${soc_variant}.bin\0" \
238 "dev_pmmc=0\0" \
239 "get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}\0" \
240 "get_pmmc_ramfs=run get_pmmc_net\0" \
241 "get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} " \
242 "${bootdir}/${name_pmmc}\0" \
243 "get_pmmc_ubi=ubifsload ${loadaddr} ${bootdir}/${name_pmmc}\0" \
244 "run_pmmc=rproc init; rproc list; " \
245 "rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; " \
246 "rproc start ${dev_pmmc}\0" \
247
Hao Zhangeb01de22014-07-09 23:44:48 +0300248#define CONFIG_EXTRA_ENV_SETTINGS \
Nishanth Menona1218962015-07-22 18:05:46 -0500249 DEFAULT_LINUX_BOOT_ENV \
Murali Karicheri449c3a62014-11-04 16:52:34 +0200250 CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
Carlos Hernandez060a3982016-03-09 15:39:31 +0530251 "bootdir=/boot\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300252 "tftp_root=/\0" \
253 "nfs_root=/export\0" \
254 "mem_lpae=1\0" \
255 "mem_reserve=512M\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300256 "addr_ubi=0x82000000\0" \
257 "addr_secdb_key=0xc000000\0" \
Nishanth Menonfdbfb192015-07-22 18:05:47 -0500258 "name_kern=zImage\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300259 "run_mon=mon_install ${addr_mon}\0" \
Murali Karichericead0b22016-03-09 15:39:38 +0530260 "run_kern=bootz ${loadaddr} ${rd_spec} ${fdtaddr}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300261 "init_net=run args_all args_net\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600262 "init_nfs=setenv autoload no; dhcp; run args_all args_net\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300263 "init_ubi=run args_all args_ubi; " \
Carlos Hernandezd45e7602016-03-09 15:39:32 +0530264 "ubi part ubifs; ubifsmount ubi:rootfs;\0" \
Nishanth Menona1218962015-07-22 18:05:46 -0500265 "get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600266 "get_fdt_nfs=nfs ${fdtaddr} ${nfs_root}/boot/${name_fdt}\0" \
Carlos Hernandez060a3982016-03-09 15:39:31 +0530267 "get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0" \
Nishanth Menona1218962015-07-22 18:05:46 -0500268 "get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600269 "get_kern_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_kern}\0" \
Carlos Hernandez060a3982016-03-09 15:39:31 +0530270 "get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300271 "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600272 "get_mon_nfs=nfs ${addr_mon} ${nfs_root}/boot/${name_mon}\0" \
Carlos Hernandez060a3982016-03-09 15:39:31 +0530273 "get_mon_ubi=ubifsload ${addr_mon} ${bootdir}/${name_mon}\0" \
Vitaly Andrianov200eecd2015-08-03 15:54:32 -0400274 "get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600275 "get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \
Cooper Jr., Franklindfa25df2015-11-19 07:45:22 -0600276 "burn_uboot_spi=sf probe; sf erase 0 0x80000; " \
Vitaly Andrianov200eecd2015-08-03 15:54:32 -0400277 "sf write ${loadaddr} 0 ${filesize}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300278 "burn_uboot_nand=nand erase 0 0x100000; " \
Vitaly Andrianov200eecd2015-08-03 15:54:32 -0400279 "nand write ${loadaddr} 0 ${filesize}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300280 "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300281 "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \
282 "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
283 "${nfs_options} ip=dhcp\0" \
284 "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \
Nishanth Menona1218962015-07-22 18:05:46 -0500285 "get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
286 "get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300287 "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
Nishanth Menona1218962015-07-22 18:05:46 -0500288 "get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300289 "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600290 "get_ubi_nfs=nfs ${addr_ubi} ${nfs_root}/boot/${name_ubi}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300291 "burn_ubi=nand erase.part ubifs; " \
292 "nand write ${addr_ubi} ubifs ${filesize}\0" \
293 "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \
294 "args_ramfs=setenv bootargs ${bootargs} " \
295 "rdinit=/sbin/init rw root=/dev/ram0 " \
Vitaly Andrianovef010d72015-08-04 11:16:16 -0400296 "initrd=0x808080000,80M\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300297 "no_post=1\0" \
298 "mtdparts=mtdparts=davinci_nand.0:" \
299 "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
300
Nishanth Menon0ce0a252016-02-25 12:53:47 -0600301#ifndef CONFIG_BOOTCOMMAND
Hao Zhangeb01de22014-07-09 23:44:48 +0300302#define CONFIG_BOOTCOMMAND \
Murali Karichericead0b22016-03-09 15:39:38 +0530303 "run init_${boot} init_fw_rd_${boot} get_fdt_${boot} " \
304 "get_mon_${boot} get_kern_${boot} run_mon run_kern"
Nishanth Menon0ce0a252016-02-25 12:53:47 -0600305#endif
Hao Zhangeb01de22014-07-09 23:44:48 +0300306
307#define CONFIG_BOOTARGS \
308
Nishanth Menonb4471512015-07-22 18:05:45 -0500309/* Now for the remaining common defines */
310#include <configs/ti_armv7_common.h>
311
312/* We wont be loading up OS from SPL for now.. */
313#undef CONFIG_SPL_OS_BOOT
314
315/* We do not have MMC support.. yet.. */
316#undef CONFIG_SPL_LIBDISK_SUPPORT
317#undef CONFIG_SPL_MMC_SUPPORT
318#undef CONFIG_SPL_FAT_SUPPORT
319#undef CONFIG_SPL_EXT_SUPPORT
320#undef CONFIG_MMC
321#undef CONFIG_GENERIC_MMC
322#undef CONFIG_CMD_MMC
Hao Zhangeb01de22014-07-09 23:44:48 +0300323
Nishanth Menonb4471512015-07-22 18:05:45 -0500324/* And no support for GPIO, yet.. */
325#undef CONFIG_SPL_GPIO_SUPPORT
Hao Zhangeb01de22014-07-09 23:44:48 +0300326
327/* we may include files below only after all above definitions */
328#include <asm/arch/hardware.h>
329#include <asm/arch/clock.h>
Vitaly Andrianov7fd5b642015-09-19 16:26:41 +0530330#ifndef CONFIG_SOC_K2G
Hao Zhangeb01de22014-07-09 23:44:48 +0300331#define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6)
Vitaly Andrianov7fd5b642015-09-19 16:26:41 +0530332#else
333#define CONFIG_SYS_HZ_CLOCK external_clk[sys_clk]
334#endif
Hao Zhangeb01de22014-07-09 23:44:48 +0300335
Hao Zhangeb01de22014-07-09 23:44:48 +0300336#endif /* __CONFIG_KS2_EVM_H */