Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) Stefano Babic <sbabic@denx.de> |
| 4 | * |
| 5 | * Configuration settings for the E+L i.MX6Q DO82 board. |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __EL6Q_COMMON_CONFIG_H |
| 9 | #define __EL6Q_COMMON_CONFIG_H |
| 10 | |
Simon Glass | fb64e36 | 2020-05-10 11:40:09 -0600 | [diff] [blame] | 11 | #include <linux/stringify.h> |
| 12 | |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 13 | #include "mx6_common.h" |
| 14 | |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 15 | #ifdef CONFIG_SPL |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 16 | #include "imx6_spl.h" |
| 17 | #endif |
| 18 | |
| 19 | /* MMC Configs */ |
| 20 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 21 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
| 22 | |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 23 | /* PMIC */ |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 24 | #define CONFIG_POWER_PFUZE100 |
| 25 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 |
| 26 | |
| 27 | /* Commands */ |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 28 | |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 29 | #define CONFIG_MXC_UART_BASE UART2_BASE |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 30 | |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 31 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Tom Rini | 272eb5b | 2022-03-21 21:33:32 -0400 | [diff] [blame^] | 32 | "board=EL6Q\0" \ |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 33 | "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \ |
| 34 | "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \ |
Simon Glass | 4694a74 | 2016-10-17 20:12:39 -0600 | [diff] [blame] | 35 | "console=" CONSOLE_DEV "\0" \ |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 36 | "fdtfile=undefined\0" \ |
| 37 | "fdt_high=0xffffffff\0" \ |
| 38 | "fdt_addr_r=0x18000000\0" \ |
| 39 | "fdt_addr=0x18000000\0" \ |
| 40 | "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \ |
Tom Rini | 9004ee0 | 2021-08-23 10:25:30 -0400 | [diff] [blame] | 41 | "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
| 42 | "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
| 43 | "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 44 | BOOTENV |
| 45 | |
| 46 | #define BOOT_TARGET_DEVICES(func) \ |
| 47 | func(MMC, mmc, 0) \ |
| 48 | func(MMC, mmc, 1) \ |
| 49 | func(PXE, PXE, na) \ |
| 50 | func(DHCP, dhcp, na) |
| 51 | |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 52 | #include <config_distro_bootcmd.h> |
| 53 | |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 54 | /* Physical Memory Map */ |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 55 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 56 | |
| 57 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 58 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 59 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 60 | |
| 61 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 62 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 63 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 64 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 65 | |
Masahiro Yamada | 8cea9b5 | 2017-02-11 22:43:54 +0900 | [diff] [blame] | 66 | /* environment organization */ |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 67 | |
Stefano Babic | 4c8d412 | 2016-06-06 11:19:42 +0200 | [diff] [blame] | 68 | #endif /* __EL6Q_COMMON_CONFIG_H */ |