blob: 91607b525e40efd616db06440e6a7c8c32ecae02 [file] [log] [blame]
Jens Scharsig9bbaae32010-02-03 22:47:35 +01001/*
2 * (C) Copyright 2002
3 * Lineo, Inc. <www.lineo.com>
4 * Bernhard Kuhn <bkuhn@lineo.com>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * (C) Copyright 2002
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Alex Zuepke <azu@sysgo.de>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
33#include <common.h>
34
Jens Scharsig58aa5632011-02-19 06:17:02 +000035#include <asm/io.h>
Andreas Bießmann20e30292010-11-30 09:45:06 +000036#include <asm/arch/hardware.h>
Jens Scharsig9bbaae32010-02-03 22:47:35 +010037#include <asm/arch/at91_tc.h>
38#include <asm/arch/at91_pmc.h>
39
Andreas Bießmann20e30292010-11-30 09:45:06 +000040DECLARE_GLOBAL_DATA_PTR;
41
Jens Scharsig9bbaae32010-02-03 22:47:35 +010042/* the number of clocks per CONFIG_SYS_HZ */
43#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
44
Jens Scharsig9bbaae32010-02-03 22:47:35 +010045int timer_init(void)
46{
Jens Scharsig58aa5632011-02-19 06:17:02 +000047 at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
48 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsig9bbaae32010-02-03 22:47:35 +010049
50 /* enables TC1.0 clock */
Jens Scharsig58aa5632011-02-19 06:17:02 +000051 writel(1 << ATMEL_ID_TC0, &pmc->pcer); /* enable clock */
Jens Scharsig9bbaae32010-02-03 22:47:35 +010052
53 writel(0, &tc->bcr);
54 writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
55 AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr);
56
57 writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr);
58 /* set to MCLK/2 and restart the timer
59 when the value in TC_RC is reached */
60 writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
61
Mike Williamsbf895ad2011-07-22 04:01:30 +000062 writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interrupts */
Jens Scharsig9bbaae32010-02-03 22:47:35 +010063 writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
64
65 writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
Andreas Bießmann20e30292010-11-30 09:45:06 +000066 gd->lastinc = 0;
67 gd->tbl = 0;
Jens Scharsig9bbaae32010-02-03 22:47:35 +010068
69 return 0;
70}
71
72/*
73 * timer without interrupts
74 */
Jens Scharsig9bbaae32010-02-03 22:47:35 +010075ulong get_timer(ulong base)
76{
77 return get_timer_masked() - base;
78}
79
Jens Scharsig9bbaae32010-02-03 22:47:35 +010080void __udelay(unsigned long usec)
81{
82 udelay_masked(usec);
83}
84
Jens Scharsig9bbaae32010-02-03 22:47:35 +010085ulong get_timer_raw(void)
86{
Jens Scharsig58aa5632011-02-19 06:17:02 +000087 at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
Jens Scharsig9bbaae32010-02-03 22:47:35 +010088 u32 now;
89
90 now = readl(&tc->tc[0].cv) & 0x0000ffff;
91
Andreas Bießmann20e30292010-11-30 09:45:06 +000092 if (now >= gd->lastinc) {
Jens Scharsig9bbaae32010-02-03 22:47:35 +010093 /* normal mode */
Andreas Bießmann20e30292010-11-30 09:45:06 +000094 gd->tbl += now - gd->lastinc;
Jens Scharsig9bbaae32010-02-03 22:47:35 +010095 } else {
96 /* we have an overflow ... */
Andreas Bießmann20e30292010-11-30 09:45:06 +000097 gd->tbl += now + TIMER_LOAD_VAL - gd->lastinc;
Jens Scharsig9bbaae32010-02-03 22:47:35 +010098 }
Andreas Bießmann20e30292010-11-30 09:45:06 +000099 gd->lastinc = now;
Jens Scharsig9bbaae32010-02-03 22:47:35 +0100100
Andreas Bießmann20e30292010-11-30 09:45:06 +0000101 return gd->tbl;
Jens Scharsig9bbaae32010-02-03 22:47:35 +0100102}
103
104ulong get_timer_masked(void)
105{
106 return get_timer_raw()/TIMER_LOAD_VAL;
107}
108
109void udelay_masked(unsigned long usec)
110{
111 u32 tmo;
112 u32 endtime;
113 signed long diff;
114
115 tmo = CONFIG_SYS_HZ_CLOCK / 1000;
116 tmo *= usec;
117 tmo /= 1000;
118
119 endtime = get_timer_raw() + tmo;
120
121 do {
122 u32 now = get_timer_raw();
123 diff = endtime - now;
124 } while (diff >= 0);
125}
126
127/*
128 * This function is derived from PowerPC code (read timebase as long long).
129 * On ARM it just returns the timer value.
130 */
131unsigned long long get_ticks(void)
132{
133 return get_timer(0);
134}
135
136/*
137 * This function is derived from PowerPC code (timebase clock frequency).
138 * On ARM it returns the number of timer ticks per second.
139 */
140ulong get_tbclk(void)
141{
142 return CONFIG_SYS_HZ;
143}