blob: 78da5abc5d3e834aff5b716716c891742ac24a6f [file] [log] [blame]
Rajan Vaja833be322019-02-15 04:45:32 -08001// SPDX-License-Identifier: GPL-2.0
Ibai Erkiagad47ed6f2019-09-27 12:51:41 +02002/*
3 * Xilinx Zynq MPSoC Firmware driver
4 *
5 * Copyright (C) 2018-2019 Xilinx, Inc.
6 */
Rajan Vaja833be322019-02-15 04:45:32 -08007
Ibai Erkiagad47ed6f2019-09-27 12:51:41 +02008#include <common.h>
Michal Simek58ba2672021-11-18 13:00:02 +01009#include <cpu_func.h>
Rajan Vaja833be322019-02-15 04:45:32 -080010#include <dm.h>
Michal Simek0fd9f362022-02-07 10:27:37 +010011#include <dm/lists.h>
Simon Glass0f2af882020-05-10 11:40:05 -060012#include <log.h>
Michal Simek81efd2a2019-10-04 15:45:29 +020013#include <zynqmp_firmware.h>
Simon Glass274e0b02020-05-10 11:39:56 -060014#include <asm/cache.h>
Simon Glass6b9f0102020-05-10 11:40:06 -060015#include <asm/ptrace.h>
Rajan Vaja833be322019-02-15 04:45:32 -080016
Ibai Erkiagad47ed6f2019-09-27 12:51:41 +020017#if defined(CONFIG_ZYNQMP_IPI)
18#include <mailbox.h>
19#include <asm/arch/sys_proto.h>
20
Ibai Erkiaga99b2c282019-09-27 11:37:00 +010021#define PMUFW_PAYLOAD_ARG_CNT 8
22
Michal Simek5f421122020-04-27 11:51:40 +020023#define XST_PM_NO_ACCESS 2002L
Michal Simek0ce829f2022-01-14 13:25:37 +010024#define XST_PM_ALREADY_CONFIGURED 2009L
Michal Simek5f421122020-04-27 11:51:40 +020025
Ibai Erkiagad47ed6f2019-09-27 12:51:41 +020026struct zynqmp_power {
27 struct mbox_chan tx_chan;
28 struct mbox_chan rx_chan;
29} zynqmp_power;
30
Michal Simek783e74c2022-01-14 13:25:35 +010031#define NODE_ID_LOCATION 5
32
33static unsigned int xpm_configobject[] = {
34 /**********************************************************************/
35 /* HEADER */
36 2, /* Number of remaining words in the header */
37 1, /* Number of sections included in config object */
38 PM_CONFIG_OBJECT_TYPE_OVERLAY, /* Type of Config object as overlay */
39 /**********************************************************************/
40 /* SLAVE SECTION */
41
42 PM_CONFIG_SLAVE_SECTION_ID, /* Section ID */
43 1, /* Number of slaves */
44
45 0, /* Node ID which will be changed below */
46 PM_SLAVE_FLAG_IS_SHAREABLE,
47 PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK |
48 PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
49 PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
50};
51
Michal Simek07168c62022-01-14 13:25:38 +010052static unsigned int xpm_configobject_close[] = {
53 /**********************************************************************/
54 /* HEADER */
55 2, /* Number of remaining words in the header */
56 1, /* Number of sections included in config object */
57 PM_CONFIG_OBJECT_TYPE_OVERLAY, /* Type of Config object as overlay */
58 /**********************************************************************/
59 /* SET CONFIG SECTION */
60 PM_CONFIG_SET_CONFIG_SECTION_ID,
61 0U, /* Loading permission to Overlay config object */
62};
63
64int zynqmp_pmufw_config_close(void)
65{
66 zynqmp_pmufw_load_config_object(xpm_configobject_close,
67 sizeof(xpm_configobject_close));
68 return 0;
69}
70
Michal Simek783e74c2022-01-14 13:25:35 +010071int zynqmp_pmufw_node(u32 id)
72{
73 /* Record power domain id */
74 xpm_configobject[NODE_ID_LOCATION] = id;
75
76 zynqmp_pmufw_load_config_object(xpm_configobject,
77 sizeof(xpm_configobject));
78
79 return 0;
80}
81
Ibai Erkiaga99b2c282019-09-27 11:37:00 +010082static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen)
83{
84 struct zynqmp_ipi_msg msg;
85 int ret;
Michal Simekae655fb2021-10-15 16:57:39 +020086 u32 buffer[PAYLOAD_ARG_CNT];
87
88 if (!res)
89 res = buffer;
Ibai Erkiaga99b2c282019-09-27 11:37:00 +010090
91 if (req_len > PMUFW_PAYLOAD_ARG_CNT ||
92 res_maxlen > PMUFW_PAYLOAD_ARG_CNT)
93 return -EINVAL;
94
95 if (!(zynqmp_power.tx_chan.dev) || !(&zynqmp_power.rx_chan.dev))
96 return -EINVAL;
97
Ibai Erkiaga22712ea2020-08-04 23:17:27 +010098 debug("%s, Sending IPI message with ID: 0x%0x\n", __func__, req[0]);
Ibai Erkiaga99b2c282019-09-27 11:37:00 +010099 msg.buf = (u32 *)req;
100 msg.len = req_len;
101 ret = mbox_send(&zynqmp_power.tx_chan, &msg);
102 if (ret) {
103 debug("%s: Sending message failed\n", __func__);
104 return ret;
105 }
106
107 msg.buf = res;
108 msg.len = res_maxlen;
109 ret = mbox_recv(&zynqmp_power.rx_chan, &msg, 100);
110 if (ret)
111 debug("%s: Receiving message failed\n", __func__);
112
113 return ret;
114}
115
116unsigned int zynqmp_firmware_version(void)
117{
118 int ret;
119 u32 ret_payload[PAYLOAD_ARG_CNT];
120 static u32 pm_api_version = ZYNQMP_PM_VERSION_INVALID;
121
122 /*
123 * Get PMU version only once and later
124 * just return stored values instead of
125 * asking PMUFW again.
126 **/
127 if (pm_api_version == ZYNQMP_PM_VERSION_INVALID) {
Ibai Erkiaga99b2c282019-09-27 11:37:00 +0100128
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100129 ret = xilinx_pm_request(PM_GET_API_VERSION, 0, 0, 0, 0,
130 ret_payload);
Ibai Erkiaga99b2c282019-09-27 11:37:00 +0100131 if (ret)
132 panic("PMUFW is not found - Please load it!\n");
133
134 pm_api_version = ret_payload[1];
135 if (pm_api_version < ZYNQMP_PM_VERSION)
136 panic("PMUFW version error. Expected: v%d.%d\n",
137 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR);
138 }
139
140 return pm_api_version;
141};
142
Ashok Reddy Soma87cdd352022-02-23 15:36:03 +0100143int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
144{
145 int ret;
146
147 ret = xilinx_pm_request(PM_IOCTL, node, IOCTL_SET_SD_CONFIG,
148 config, value, NULL);
149 if (ret)
150 printf("%s: node %d: set_sd_config %d failed\n",
151 __func__, node, config);
152
153 return ret;
154}
155
156int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
157{
158 int ret;
159 u32 *bit_mask;
160 u32 ret_payload[PAYLOAD_ARG_CNT];
161
162 /* Input arguments validation */
163 if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA))
164 return -EINVAL;
165
166 /* Check feature check API version */
167 ret = xilinx_pm_request(PM_FEATURE_CHECK, PM_FEATURE_CHECK, 0, 0, 0,
168 ret_payload);
169 if (ret)
170 return ret;
171
172 /* Check if feature check version 2 is supported or not */
173 if ((ret_payload[1] & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) {
174 /*
175 * Call feature check for IOCTL/QUERY API to get IOCTL ID or
176 * QUERY ID feature status.
177 */
178
179 ret = xilinx_pm_request(PM_FEATURE_CHECK, api_id, 0, 0, 0,
180 ret_payload);
181 if (ret)
182 return ret;
183
184 bit_mask = &ret_payload[2];
185 if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0)
186 return -EOPNOTSUPP;
187 } else {
188 return -ENODATA;
189 }
190
191 return 0;
192}
193
Michal Simeka95f0d92019-09-27 14:20:00 +0200194/**
195 * Send a configuration object to the PMU firmware.
196 *
197 * @cfg_obj: Pointer to the configuration object
198 * @size: Size of @cfg_obj in bytes
199 */
200void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size)
201{
Michal Simeka95f0d92019-09-27 14:20:00 +0200202 int err;
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100203 u32 ret_payload[PAYLOAD_ARG_CNT];
Michal Simeka95f0d92019-09-27 14:20:00 +0200204
Michal Simek957b2482022-01-14 13:25:36 +0100205 if (IS_ENABLED(CONFIG_SPL_BUILD))
206 printf("Loading new PMUFW cfg obj (%ld bytes)\n", size);
Michal Simeka95f0d92019-09-27 14:20:00 +0200207
Michal Simek58ba2672021-11-18 13:00:02 +0100208 flush_dcache_range((ulong)cfg_obj, (ulong)(cfg_obj + size));
209
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100210 err = xilinx_pm_request(PM_SET_CONFIGURATION, (u32)(u64)cfg_obj, 0, 0,
211 0, ret_payload);
Michal Simek5f421122020-04-27 11:51:40 +0200212 if (err == XST_PM_NO_ACCESS) {
213 printf("PMUFW no permission to change config object\n");
214 return;
215 }
216
Michal Simek0ce829f2022-01-14 13:25:37 +0100217 if (err == XST_PM_ALREADY_CONFIGURED) {
218 debug("PMUFW Node is already configured\n");
219 return;
220 }
221
Michal Simeka95f0d92019-09-27 14:20:00 +0200222 if (err)
Michal Simek5f421122020-04-27 11:51:40 +0200223 printf("Cannot load PMUFW configuration object (%d)\n", err);
224
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100225 if (ret_payload[0])
226 printf("PMUFW returned 0x%08x status!\n", ret_payload[0]);
Michal Simek5f421122020-04-27 11:51:40 +0200227
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100228 if ((err || ret_payload[0]) && IS_ENABLED(CONFIG_SPL_BUILD))
Michal Simek5f421122020-04-27 11:51:40 +0200229 panic("PMUFW config object loading failed in EL3\n");
Michal Simeka95f0d92019-09-27 14:20:00 +0200230}
231
Ibai Erkiagad47ed6f2019-09-27 12:51:41 +0200232static int zynqmp_power_probe(struct udevice *dev)
233{
Michal Simek8ece0722019-10-10 11:26:16 +0200234 int ret;
Ibai Erkiagad47ed6f2019-09-27 12:51:41 +0200235
236 debug("%s, (dev=%p)\n", __func__, dev);
237
238 ret = mbox_get_by_name(dev, "tx", &zynqmp_power.tx_chan);
239 if (ret) {
Michal Simek8ece0722019-10-10 11:26:16 +0200240 debug("%s: Cannot find tx mailbox\n", __func__);
Ibai Erkiagad47ed6f2019-09-27 12:51:41 +0200241 return ret;
242 }
243
244 ret = mbox_get_by_name(dev, "rx", &zynqmp_power.rx_chan);
Ibai Erkiaga99b2c282019-09-27 11:37:00 +0100245 if (ret) {
Michal Simek8ece0722019-10-10 11:26:16 +0200246 debug("%s: Cannot find rx mailbox\n", __func__);
Ibai Erkiaga99b2c282019-09-27 11:37:00 +0100247 return ret;
248 }
Ibai Erkiagad47ed6f2019-09-27 12:51:41 +0200249
Ibai Erkiaga99b2c282019-09-27 11:37:00 +0100250 ret = zynqmp_firmware_version();
251 printf("PMUFW:\tv%d.%d\n",
252 ret >> ZYNQMP_PM_VERSION_MAJOR_SHIFT,
253 ret & ZYNQMP_PM_VERSION_MINOR_MASK);
254
255 return 0;
Ibai Erkiagad47ed6f2019-09-27 12:51:41 +0200256};
257
258static const struct udevice_id zynqmp_power_ids[] = {
259 { .compatible = "xlnx,zynqmp-power" },
260 { }
261};
262
263U_BOOT_DRIVER(zynqmp_power) = {
264 .name = "zynqmp_power",
265 .id = UCLASS_FIRMWARE,
266 .of_match = zynqmp_power_ids,
267 .probe = zynqmp_power_probe,
268};
269#endif
270
Michal Simek4c3de372019-10-04 15:35:45 +0200271int __maybe_unused xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
272 u32 arg3, u32 *ret_payload)
Michal Simek81efd2a2019-10-04 15:45:29 +0200273{
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100274 debug("%s at EL%d, API ID: 0x%0x\n", __func__, current_el(), api_id);
Michal Simek81efd2a2019-10-04 15:45:29 +0200275
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100276 if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) {
277#if defined(CONFIG_ZYNQMP_IPI)
278 /*
279 * Use fixed payload and arg size as the EL2 call. The firmware
280 * is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the
281 * firmware API is limited by the SMC call size
282 */
283 u32 regs[] = {api_id, arg0, arg1, arg2, arg3};
Michal Simek577385a2021-10-15 16:57:38 +0200284 int ret;
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100285
Michal Simekf33d95b2020-10-05 15:23:28 +0200286 if (api_id == PM_FPGA_LOAD) {
287 /* Swap addr_hi/low because of incompatibility */
288 u32 temp = regs[1];
289
290 regs[1] = regs[2];
291 regs[2] = temp;
292 }
293
Michal Simek577385a2021-10-15 16:57:38 +0200294 ret = ipi_req(regs, PAYLOAD_ARG_CNT, ret_payload,
295 PAYLOAD_ARG_CNT);
296 if (ret)
297 return ret;
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100298#else
Michal Simek4ca6e952019-10-10 11:09:15 +0200299 return -EPERM;
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100300#endif
301 } else {
302 /*
303 * Added SIP service call Function Identifier
304 * Make sure to stay in x0 register
305 */
306 struct pt_regs regs;
Michal Simek81efd2a2019-10-04 15:45:29 +0200307
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100308 regs.regs[0] = PM_SIP_SVC | api_id;
309 regs.regs[1] = ((u64)arg1 << 32) | arg0;
310 regs.regs[2] = ((u64)arg3 << 32) | arg2;
Michal Simek81efd2a2019-10-04 15:45:29 +0200311
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100312 smc_call(&regs);
Michal Simek81efd2a2019-10-04 15:45:29 +0200313
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100314 if (ret_payload) {
315 ret_payload[0] = (u32)regs.regs[0];
316 ret_payload[1] = upper_32_bits(regs.regs[0]);
317 ret_payload[2] = (u32)regs.regs[1];
318 ret_payload[3] = upper_32_bits(regs.regs[1]);
319 ret_payload[4] = (u32)regs.regs[2];
320 }
Michal Simek81efd2a2019-10-04 15:45:29 +0200321
Ibai Erkiaga22712ea2020-08-04 23:17:27 +0100322 }
323 return (ret_payload) ? ret_payload[0] : 0;
Michal Simek81efd2a2019-10-04 15:45:29 +0200324}
325
Rajan Vaja833be322019-02-15 04:45:32 -0800326static const struct udevice_id zynqmp_firmware_ids[] = {
327 { .compatible = "xlnx,zynqmp-firmware" },
Siva Durga Prasad Paladuguf7a71202019-06-23 12:24:57 +0530328 { .compatible = "xlnx,versal-firmware"},
Rajan Vaja833be322019-02-15 04:45:32 -0800329 { }
330};
331
Michal Simek0fd9f362022-02-07 10:27:37 +0100332static int zynqmp_firmware_bind(struct udevice *dev)
333{
334 int ret;
335 struct udevice *child;
336
Michal Simek259af932022-02-28 17:13:15 +0100337 if ((IS_ENABLED(CONFIG_SPL_BUILD) &&
338 IS_ENABLED(CONFIG_SPL_POWER_DOMAIN) &&
339 IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN)) ||
340 (!IS_ENABLED(CONFIG_SPL_BUILD) &&
341 IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN))) {
Michal Simek0fd9f362022-02-07 10:27:37 +0100342 ret = device_bind_driver_to_node(dev, "zynqmp_power_domain",
343 "zynqmp_power_domain",
344 dev_ofnode(dev), &child);
345 if (ret) {
346 printf("zynqmp power domain driver is not bound: %d\n", ret);
347 return ret;
348 }
349 }
350
351 return dm_scan_fdt_dev(dev);
352}
353
Rajan Vaja833be322019-02-15 04:45:32 -0800354U_BOOT_DRIVER(zynqmp_firmware) = {
355 .id = UCLASS_FIRMWARE,
Michal Simek33093082020-01-07 08:50:34 +0100356 .name = "zynqmp_firmware",
Rajan Vaja833be322019-02-15 04:45:32 -0800357 .of_match = zynqmp_firmware_ids,
Michal Simek0fd9f362022-02-07 10:27:37 +0100358 .bind = zynqmp_firmware_bind,
Rajan Vaja833be322019-02-15 04:45:32 -0800359};