| Simon Glass | ddb39b2 | 2019-08-24 14:10:32 -0600 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <handoff.h> |
| 8 | #include <asm/fsp/fsp_support.h> |
| 9 | #include <asm/e820.h> |
| 10 | #include <asm/mrccache.h> |
| 11 | #include <asm/post.h> |
| 12 | |
| 13 | DECLARE_GLOBAL_DATA_PTR; |
| 14 | |
| 15 | int fsp_scan_for_ram_size(void) |
| 16 | { |
| 17 | phys_size_t ram_size = 0; |
| 18 | const struct hob_header *hdr; |
| 19 | struct hob_res_desc *res_desc; |
| 20 | |
| 21 | hdr = gd->arch.hob_list; |
| 22 | while (!end_of_hob(hdr)) { |
| 23 | if (hdr->type == HOB_TYPE_RES_DESC) { |
| 24 | res_desc = (struct hob_res_desc *)hdr; |
| 25 | if (res_desc->type == RES_SYS_MEM || |
| 26 | res_desc->type == RES_MEM_RESERVED) |
| 27 | ram_size += res_desc->len; |
| 28 | } |
| 29 | hdr = get_next_hob(hdr); |
| 30 | } |
| 31 | |
| 32 | gd->ram_size = ram_size; |
| 33 | post_code(POST_DRAM); |
| 34 | |
| 35 | return 0; |
| 36 | }; |
| 37 | |
| 38 | int dram_init_banksize(void) |
| 39 | { |
| 40 | gd->bd->bi_dram[0].start = 0; |
| 41 | gd->bd->bi_dram[0].size = gd->ram_size; |
| 42 | |
| 43 | return 0; |
| 44 | } |
| 45 | |
| 46 | unsigned int install_e820_map(unsigned int max_entries, |
| 47 | struct e820_entry *entries) |
| 48 | { |
| 49 | unsigned int num_entries = 0; |
| 50 | const struct hob_header *hdr; |
| 51 | struct hob_res_desc *res_desc; |
| 52 | |
| 53 | hdr = gd->arch.hob_list; |
| 54 | |
| 55 | while (!end_of_hob(hdr)) { |
| 56 | if (hdr->type == HOB_TYPE_RES_DESC) { |
| 57 | res_desc = (struct hob_res_desc *)hdr; |
| 58 | entries[num_entries].addr = res_desc->phys_start; |
| 59 | entries[num_entries].size = res_desc->len; |
| 60 | |
| 61 | if (res_desc->type == RES_SYS_MEM) |
| 62 | entries[num_entries].type = E820_RAM; |
| 63 | else if (res_desc->type == RES_MEM_RESERVED) |
| 64 | entries[num_entries].type = E820_RESERVED; |
| 65 | |
| 66 | num_entries++; |
| 67 | } |
| 68 | hdr = get_next_hob(hdr); |
| 69 | } |
| 70 | |
| 71 | /* Mark PCIe ECAM address range as reserved */ |
| 72 | entries[num_entries].addr = CONFIG_PCIE_ECAM_BASE; |
| 73 | entries[num_entries].size = CONFIG_PCIE_ECAM_SIZE; |
| 74 | entries[num_entries].type = E820_RESERVED; |
| 75 | num_entries++; |
| 76 | |
| 77 | #ifdef CONFIG_HAVE_ACPI_RESUME |
| 78 | /* |
| 79 | * Everything between U-Boot's stack and ram top needs to be |
| 80 | * reserved in order for ACPI S3 resume to work. |
| 81 | */ |
| 82 | entries[num_entries].addr = gd->start_addr_sp - CONFIG_STACK_SIZE; |
| 83 | entries[num_entries].size = gd->ram_top - gd->start_addr_sp + |
| 84 | CONFIG_STACK_SIZE; |
| 85 | entries[num_entries].type = E820_RESERVED; |
| 86 | num_entries++; |
| 87 | #endif |
| 88 | |
| 89 | return num_entries; |
| 90 | } |