blob: a299b129a24a4acba1f0888138e7966f4d17b72e [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * This provides a bit-banged interface to the ethernet MII management
26 * channel.
27 */
28
29#include <common.h>
30#include <miiphy.h>
31
Marian Balakowiczaab8c492005-10-28 22:30:33 +020032#include <asm/types.h>
33#include <linux/list.h>
34#include <malloc.h>
35#include <net.h>
36
37/* local debug macro */
Marian Balakowiczaab8c492005-10-28 22:30:33 +020038#undef MII_DEBUG
39
40#undef debug
41#ifdef MII_DEBUG
42#define debug(fmt,args...) printf (fmt ,##args)
43#else
44#define debug(fmt,args...)
45#endif /* MII_DEBUG */
46
47struct mii_dev {
48 struct list_head link;
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040049 const char *name;
50 int (*read) (const char *devname, unsigned char addr,
Larry Johnson81b974b2007-10-31 11:21:29 -050051 unsigned char reg, unsigned short *value);
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040052 int (*write) (const char *devname, unsigned char addr,
Larry Johnson81b974b2007-10-31 11:21:29 -050053 unsigned char reg, unsigned short value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020054};
55
56static struct list_head mii_devs;
57static struct mii_dev *current_mii;
58
59/*****************************************************************************
60 *
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010061 * Initialize global data. Need to be called before any other miiphy routine.
62 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040063void miiphy_init(void)
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010064{
Larry Johnson81b974b2007-10-31 11:21:29 -050065 INIT_LIST_HEAD (&mii_devs);
66 current_mii = NULL;
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010067}
68
69/*****************************************************************************
70 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +020071 * Register read and write MII access routines for the device <name>.
72 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040073void miiphy_register(const char *name,
74 int (*read) (const char *devname, unsigned char addr,
Larry Johnson81b974b2007-10-31 11:21:29 -050075 unsigned char reg, unsigned short *value),
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040076 int (*write) (const char *devname, unsigned char addr,
Larry Johnson81b974b2007-10-31 11:21:29 -050077 unsigned char reg, unsigned short value))
Marian Balakowiczaab8c492005-10-28 22:30:33 +020078{
79 struct list_head *entry;
80 struct mii_dev *new_dev;
81 struct mii_dev *miidev;
Marian Balakowiczaab8c492005-10-28 22:30:33 +020082 unsigned int name_len;
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -040083 char *new_name;
Marian Balakowiczaab8c492005-10-28 22:30:33 +020084
Marian Balakowiczaab8c492005-10-28 22:30:33 +020085 /* check if we have unique name */
Larry Johnson81b974b2007-10-31 11:21:29 -050086 list_for_each (entry, &mii_devs) {
87 miidev = list_entry (entry, struct mii_dev, link);
88 if (strcmp (miidev->name, name) == 0) {
89 printf ("miiphy_register: non unique device name "
90 "'%s'\n", name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020091 return;
92 }
93 }
94
95 /* allocate memory */
Larry Johnson81b974b2007-10-31 11:21:29 -050096 name_len = strlen (name);
97 new_dev =
98 (struct mii_dev *)malloc (sizeof (struct mii_dev) + name_len + 1);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020099
Larry Johnson81b974b2007-10-31 11:21:29 -0500100 if (new_dev == NULL) {
101 printf ("miiphy_register: cannot allocate memory for '%s'\n",
102 name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200103 return;
104 }
Larry Johnson81b974b2007-10-31 11:21:29 -0500105 memset (new_dev, 0, sizeof (struct mii_dev) + name_len);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200106
107 /* initalize mii_dev struct fields */
Larry Johnson81b974b2007-10-31 11:21:29 -0500108 INIT_LIST_HEAD (&new_dev->link);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200109 new_dev->read = read;
110 new_dev->write = write;
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400111 new_dev->name = new_name = (char *)(new_dev + 1);
112 strncpy (new_name, name, name_len);
113 new_name[name_len] = '\0';
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200114
Larry Johnson81b974b2007-10-31 11:21:29 -0500115 debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
116 new_dev->name, new_dev->read, new_dev->write);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200117
118 /* add it to the list */
Larry Johnson81b974b2007-10-31 11:21:29 -0500119 list_add_tail (&new_dev->link, &mii_devs);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200120
121 if (!current_mii)
122 current_mii = new_dev;
123}
124
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400125int miiphy_set_current_dev(const char *devname)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200126{
127 struct list_head *entry;
128 struct mii_dev *dev;
129
Larry Johnson81b974b2007-10-31 11:21:29 -0500130 list_for_each (entry, &mii_devs) {
131 dev = list_entry (entry, struct mii_dev, link);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200132
Larry Johnson81b974b2007-10-31 11:21:29 -0500133 if (strcmp (devname, dev->name) == 0) {
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200134 current_mii = dev;
135 return 0;
136 }
137 }
138
Larry Johnson81b974b2007-10-31 11:21:29 -0500139 printf ("No such device: %s\n", devname);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200140 return 1;
141}
142
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400143const char *miiphy_get_current_dev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200144{
145 if (current_mii)
146 return current_mii->name;
147
148 return NULL;
149}
150
151/*****************************************************************************
152 *
153 * Read to variable <value> from the PHY attached to device <devname>,
154 * use PHY address <addr> and register <reg>.
155 *
156 * Returns:
157 * 0 on success
158 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400159int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500160 unsigned short *value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200161{
162 struct list_head *entry;
163 struct mii_dev *dev;
164 int found_dev = 0;
165 int read_ret = 0;
166
167 if (!devname) {
Larry Johnson81b974b2007-10-31 11:21:29 -0500168 printf ("NULL device name!\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200169 return 1;
170 }
171
Larry Johnson81b974b2007-10-31 11:21:29 -0500172 list_for_each (entry, &mii_devs) {
173 dev = list_entry (entry, struct mii_dev, link);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200174
Larry Johnson81b974b2007-10-31 11:21:29 -0500175 if (strcmp (devname, dev->name) == 0) {
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200176 found_dev = 1;
Larry Johnson81b974b2007-10-31 11:21:29 -0500177 read_ret = dev->read (devname, addr, reg, value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200178 break;
179 }
180 }
181
182 if (found_dev == 0)
Larry Johnson81b974b2007-10-31 11:21:29 -0500183 printf ("No such device: %s\n", devname);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200184
185 return ((found_dev) ? read_ret : 1);
186}
187
188/*****************************************************************************
189 *
190 * Write <value> to the PHY attached to device <devname>,
191 * use PHY address <addr> and register <reg>.
192 *
193 * Returns:
194 * 0 on success
195 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400196int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500197 unsigned short value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200198{
199 struct list_head *entry;
200 struct mii_dev *dev;
201 int found_dev = 0;
202 int write_ret = 0;
203
204 if (!devname) {
Larry Johnson81b974b2007-10-31 11:21:29 -0500205 printf ("NULL device name!\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200206 return 1;
207 }
208
Larry Johnson81b974b2007-10-31 11:21:29 -0500209 list_for_each (entry, &mii_devs) {
210 dev = list_entry (entry, struct mii_dev, link);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200211
Larry Johnson81b974b2007-10-31 11:21:29 -0500212 if (strcmp (devname, dev->name) == 0) {
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200213 found_dev = 1;
Larry Johnson81b974b2007-10-31 11:21:29 -0500214 write_ret = dev->write (devname, addr, reg, value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200215 break;
216 }
217 }
218
219 if (found_dev == 0)
Larry Johnson81b974b2007-10-31 11:21:29 -0500220 printf ("No such device: %s\n", devname);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200221
222 return ((found_dev) ? write_ret : 1);
223}
224
225/*****************************************************************************
226 *
227 * Print out list of registered MII capable devices.
228 */
Larry Johnson81b974b2007-10-31 11:21:29 -0500229void miiphy_listdev (void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200230{
231 struct list_head *entry;
232 struct mii_dev *dev;
233
Larry Johnson81b974b2007-10-31 11:21:29 -0500234 puts ("MII devices: ");
235 list_for_each (entry, &mii_devs) {
236 dev = list_entry (entry, struct mii_dev, link);
237 printf ("'%s' ", dev->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200238 }
Larry Johnson81b974b2007-10-31 11:21:29 -0500239 puts ("\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200240
241 if (current_mii)
Larry Johnson81b974b2007-10-31 11:21:29 -0500242 printf ("Current device: '%s'\n", current_mii->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200243}
244
wdenkc6097192002-11-03 00:24:07 +0000245/*****************************************************************************
246 *
247 * Read the OUI, manufacture's model number, and revision number.
248 *
249 * OUI: 22 bits (unsigned int)
250 * Model: 6 bits (unsigned char)
251 * Revision: 4 bits (unsigned char)
252 *
253 * Returns:
254 * 0 on success
255 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400256int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000257 unsigned char *model, unsigned char *rev)
258{
259 unsigned int reg = 0;
wdenkf4cec3f2003-12-06 23:20:41 +0000260 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000261
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200262 if (miiphy_read (devname, addr, PHY_PHYIDR2, &tmp) != 0) {
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900263 debug ("PHY ID register 2 read failed\n");
wdenkc6097192002-11-03 00:24:07 +0000264 return (-1);
265 }
wdenkf4cec3f2003-12-06 23:20:41 +0000266 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000267
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900268 debug ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
269
wdenkc6097192002-11-03 00:24:07 +0000270 if (reg == 0xFFFF) {
271 /* No physical device present at this address */
272 return (-1);
273 }
274
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200275 if (miiphy_read (devname, addr, PHY_PHYIDR1, &tmp) != 0) {
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900276 debug ("PHY ID register 1 read failed\n");
wdenkc6097192002-11-03 00:24:07 +0000277 return (-1);
278 }
wdenkf4cec3f2003-12-06 23:20:41 +0000279 reg |= tmp << 16;
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900280 debug ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
281
Larry Johnson81b974b2007-10-31 11:21:29 -0500282 *oui = (reg >> 10);
283 *model = (unsigned char)((reg >> 4) & 0x0000003F);
284 *rev = (unsigned char)(reg & 0x0000000F);
wdenkc6097192002-11-03 00:24:07 +0000285 return (0);
286}
287
wdenkc6097192002-11-03 00:24:07 +0000288/*****************************************************************************
289 *
290 * Reset the PHY.
291 * Returns:
292 * 0 on success
293 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400294int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000295{
296 unsigned short reg;
Stefan Roese2e536362010-02-02 13:43:48 +0100297 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000298
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200299 if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900300 debug ("PHY status read failed\n");
Wolfgang Denk8ff63c22005-08-12 23:15:53 +0200301 return (-1);
302 }
Niklaus Giger23f55e82009-09-23 08:12:14 +0200303 if (miiphy_write (devname, addr, PHY_BMCR, reg | PHY_BMCR_RESET) != 0) {
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900304 debug ("PHY reset failed\n");
wdenkc6097192002-11-03 00:24:07 +0000305 return (-1);
306 }
wdenk2cefd152004-02-08 22:55:38 +0000307#ifdef CONFIG_PHY_RESET_DELAY
308 udelay (CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
309#endif
wdenkc6097192002-11-03 00:24:07 +0000310 /*
311 * Poll the control register for the reset bit to go to 0 (it is
312 * auto-clearing). This should happen within 0.5 seconds per the
313 * IEEE spec.
314 */
wdenkc6097192002-11-03 00:24:07 +0000315 reg = 0x8000;
Stefan Roese2e536362010-02-02 13:43:48 +0100316 while (((reg & 0x8000) != 0) && timeout--) {
317 if (miiphy_read(devname, addr, PHY_BMCR, &reg) != 0) {
318 debug("PHY status read failed\n");
319 return -1;
wdenkc6097192002-11-03 00:24:07 +0000320 }
Stefan Roese2e536362010-02-02 13:43:48 +0100321 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000322 }
323 if ((reg & 0x8000) == 0) {
324 return (0);
325 } else {
wdenk42c05472004-03-23 22:14:11 +0000326 puts ("PHY reset timed out\n");
wdenkc6097192002-11-03 00:24:07 +0000327 return (-1);
328 }
329 return (0);
330}
331
wdenkc6097192002-11-03 00:24:07 +0000332/*****************************************************************************
333 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500334 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000335 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400336int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000337{
Larry Johnson966a80b2007-11-01 08:46:50 -0500338 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000339
wdenkeec9a3d2004-03-23 23:20:24 +0000340#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500341 u16 btsr;
342
343 /*
344 * Check for 1000BASE-X. If it is supported, then assume that the speed
345 * is 1000.
346 */
347 if (miiphy_is_1000base_x (devname, addr)) {
348 return _1000BASET;
349 }
350 /*
351 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
352 */
353 /* Check for 1000BASE-T. */
354 if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) {
355 printf ("PHY 1000BT status");
356 goto miiphy_read_failed;
357 }
358 if (btsr != 0xFFFF &&
359 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) {
360 return _1000BASET;
wdenked2ac4b2004-03-14 18:23:55 +0000361 }
wdenkeec9a3d2004-03-23 23:20:24 +0000362#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000363
wdenke3a06802004-06-06 23:13:55 +0000364 /* Check Basic Management Control Register first. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500365 if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) {
366 printf ("PHY speed");
367 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000368 }
wdenke3a06802004-06-06 23:13:55 +0000369 /* Check if auto-negotiation is on. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500370 if (bmcr & PHY_BMCR_AUTON) {
wdenke3a06802004-06-06 23:13:55 +0000371 /* Get auto-negotiation results. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500372 if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
373 printf ("PHY AN speed");
374 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000375 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500376 return (anlpar & PHY_ANLPAR_100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000377 }
378 /* Get speed from basic control settings. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500379 return (bmcr & PHY_BMCR_100MB) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000380
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200381miiphy_read_failed:
Larry Johnson966a80b2007-11-01 08:46:50 -0500382 printf (" read failed, assuming 10BASE-T\n");
383 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000384}
385
wdenkc6097192002-11-03 00:24:07 +0000386/*****************************************************************************
387 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500388 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000389 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400390int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000391{
Larry Johnson966a80b2007-11-01 08:46:50 -0500392 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000393
wdenkeec9a3d2004-03-23 23:20:24 +0000394#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500395 u16 btsr;
396
397 /* Check for 1000BASE-X. */
398 if (miiphy_is_1000base_x (devname, addr)) {
399 /* 1000BASE-X */
400 if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
401 printf ("1000BASE-X PHY AN duplex");
402 goto miiphy_read_failed;
wdenked2ac4b2004-03-14 18:23:55 +0000403 }
404 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500405 /*
406 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
407 */
408 /* Check for 1000BASE-T. */
409 if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) {
410 printf ("PHY 1000BT status");
411 goto miiphy_read_failed;
412 }
413 if (btsr != 0xFFFF) {
414 if (btsr & PHY_1000BTSR_1000FD) {
415 return FULL;
416 } else if (btsr & PHY_1000BTSR_1000HD) {
417 return HALF;
418 }
419 }
wdenkeec9a3d2004-03-23 23:20:24 +0000420#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000421
wdenke3a06802004-06-06 23:13:55 +0000422 /* Check Basic Management Control Register first. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500423 if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) {
424 puts ("PHY duplex");
425 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000426 }
wdenke3a06802004-06-06 23:13:55 +0000427 /* Check if auto-negotiation is on. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500428 if (bmcr & PHY_BMCR_AUTON) {
wdenke3a06802004-06-06 23:13:55 +0000429 /* Get auto-negotiation results. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500430 if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
431 puts ("PHY AN duplex");
432 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000433 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500434 return (anlpar & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) ?
435 FULL : HALF;
wdenke3a06802004-06-06 23:13:55 +0000436 }
437 /* Get speed from basic control settings. */
Larry Johnson966a80b2007-11-01 08:46:50 -0500438 return (bmcr & PHY_BMCR_DPLX) ? FULL : HALF;
439
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200440miiphy_read_failed:
Larry Johnson966a80b2007-11-01 08:46:50 -0500441 printf (" read failed, assuming half duplex\n");
442 return HALF;
443}
wdenke3a06802004-06-06 23:13:55 +0000444
Larry Johnson966a80b2007-11-01 08:46:50 -0500445/*****************************************************************************
446 *
447 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
448 * 1000BASE-T, or on error.
449 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400450int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson966a80b2007-11-01 08:46:50 -0500451{
452#if defined(CONFIG_PHY_GIGE)
453 u16 exsr;
454
455 if (miiphy_read (devname, addr, PHY_EXSR, &exsr)) {
456 printf ("PHY extended status read failed, assuming no "
457 "1000BASE-X\n");
458 return 0;
459 }
460 return 0 != (exsr & (PHY_EXSR_1000XF | PHY_EXSR_1000XH));
461#else
462 return 0;
463#endif
wdenkc6097192002-11-03 00:24:07 +0000464}
465
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200466#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenk49c3f672003-10-08 22:33:00 +0000467/*****************************************************************************
468 *
469 * Determine link status
470 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400471int miiphy_link(const char *devname, unsigned char addr)
wdenk49c3f672003-10-08 22:33:00 +0000472{
473 unsigned short reg;
474
wdenk145d2c12004-04-15 21:48:45 +0000475 /* dummy read; needed to latch some phys */
Larry Johnson81b974b2007-10-31 11:21:29 -0500476 (void)miiphy_read (devname, addr, PHY_BMSR, &reg);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200477 if (miiphy_read (devname, addr, PHY_BMSR, &reg)) {
wdenk42c05472004-03-23 22:14:11 +0000478 puts ("PHY_BMSR read failed, assuming no link\n");
wdenk49c3f672003-10-08 22:33:00 +0000479 return (0);
480 }
481
482 /* Determine if a link is active */
483 if ((reg & PHY_BMSR_LS) != 0) {
484 return (1);
485 } else {
486 return (0);
487 }
488}
489#endif