blob: 7ae3bd1c535388572836269f666f4f1c1923140c [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Simon Glass780ba482016-03-11 22:06:58 -07002/*
3 * Copyright (c) 2016 Google, Inc
Simon Glass780ba482016-03-11 22:06:58 -07004 */
5
6#ifndef __ASM_CPU_COMMON_H
7#define __ASM_CPU_COMMON_H
8
Simon Glassaba3c602019-09-25 08:11:35 -06009struct cpu_info;
10
Simon Glass780ba482016-03-11 22:06:58 -070011/**
12 * cpu_common_init() - Set up common CPU init
13 *
14 * This reports BIST failure, enables the LAPIC, updates microcode, enables
15 * the upper 128-bytes of CROM RAM, probes the northbridge, PCH, LPC and SATA.
16 *
17 * @return 0 if OK, -ve on error
18 */
19int cpu_common_init(void);
20
21/**
22 * cpu_set_flex_ratio_to_tdp_nominal() - Set up the maximum non-turbo rate
23 *
24 * If a change is needed, this function will do a soft reset so it takes
25 * effect.
26 *
27 * Some details are available here:
28 * http://forum.hwbot.org/showthread.php?t=76092
29 *
30 * @return 0 if OK, -ve on error
31 */
32int cpu_set_flex_ratio_to_tdp_nominal(void);
33
Simon Glassaba3c602019-09-25 08:11:35 -060034/**
35 * cpu_intel_get_info() - Obtain CPU info for Intel CPUs
36 *
37 * Most Intel CPUs use the same MSR to obtain the clock speed, and use the same
38 * features. This function fills in these values, given the value of the base
39 * clock in MHz (typically this should be set to 100).
40 *
41 * @info: cpu_info struct to fill in
42 * @bclk_mz: the base clock in MHz
43 *
44 * @return 0 always
45 */
46int cpu_intel_get_info(struct cpu_info *info, int bclk_mz);
47
Simon Glass780ba482016-03-11 22:06:58 -070048#endif