| Andreas Bießmann | 9a48c5c | 2013-04-02 06:05:54 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com> |
| 3 | * Rohit Choraria <rohitkc@ti.com> |
| 4 | * |
| 5 | * (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com> |
| 6 | * |
| Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
| Andreas Bießmann | 9a48c5c | 2013-04-02 06:05:54 +0000 | [diff] [blame] | 8 | */ |
| 9 | #ifndef __ASM_OMAP_GPMC_H |
| 10 | #define __ASM_OMAP_GPMC_H |
| 11 | |
| Andreas Bießmann | 9a48c5c | 2013-04-02 06:05:54 +0000 | [diff] [blame] | 12 | #define GPMC_BUF_EMPTY 0 |
| 13 | #define GPMC_BUF_FULL 1 |
| 14 | |
| pekon gupta | 6bd91a8 | 2013-11-18 19:03:00 +0530 | [diff] [blame] | 15 | enum omap_ecc { |
| 16 | /* 1-bit ECC calculation by Software, Error detection by Software */ |
| 17 | OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */ |
| 18 | /* 1-bit ECC calculation by GPMC, Error detection by Software */ |
| 19 | /* ECC layout compatible to legacy ROMCODE. */ |
| 20 | OMAP_ECC_HAM1_CODE_HW, |
| 21 | /* 4-bit ECC calculation by GPMC, Error detection by Software */ |
| 22 | OMAP_ECC_BCH4_CODE_HW_DETECTION_SW, |
| 23 | /* 4-bit ECC calculation by GPMC, Error detection by ELM */ |
| 24 | OMAP_ECC_BCH4_CODE_HW, |
| 25 | /* 8-bit ECC calculation by GPMC, Error detection by Software */ |
| 26 | OMAP_ECC_BCH8_CODE_HW_DETECTION_SW, |
| 27 | /* 8-bit ECC calculation by GPMC, Error detection by ELM */ |
| 28 | OMAP_ECC_BCH8_CODE_HW, |
| 29 | }; |
| 30 | |
| pekon gupta | c77f284 | 2013-11-22 16:53:28 +0530 | [diff] [blame] | 31 | struct gpmc_cs { |
| 32 | u32 config1; /* 0x00 */ |
| 33 | u32 config2; /* 0x04 */ |
| 34 | u32 config3; /* 0x08 */ |
| 35 | u32 config4; /* 0x0C */ |
| 36 | u32 config5; /* 0x10 */ |
| 37 | u32 config6; /* 0x14 */ |
| 38 | u32 config7; /* 0x18 */ |
| 39 | u32 nand_cmd; /* 0x1C */ |
| 40 | u32 nand_adr; /* 0x20 */ |
| 41 | u32 nand_dat; /* 0x24 */ |
| 42 | u8 res[8]; /* blow up to 0x30 byte */ |
| 43 | }; |
| 44 | |
| 45 | struct bch_res_0_3 { |
| 46 | u32 bch_result_x[4]; |
| 47 | }; |
| 48 | |
| 49 | struct gpmc { |
| 50 | u8 res1[0x10]; |
| 51 | u32 sysconfig; /* 0x10 */ |
| 52 | u8 res2[0x4]; |
| 53 | u32 irqstatus; /* 0x18 */ |
| 54 | u32 irqenable; /* 0x1C */ |
| 55 | u8 res3[0x20]; |
| 56 | u32 timeout_control; /* 0x40 */ |
| 57 | u8 res4[0xC]; |
| 58 | u32 config; /* 0x50 */ |
| 59 | u32 status; /* 0x54 */ |
| 60 | u8 res5[0x8]; /* 0x58 */ |
| 61 | struct gpmc_cs cs[8]; /* 0x60, 0x90, .. */ |
| 62 | u8 res6[0x14]; /* 0x1E0 */ |
| 63 | u32 ecc_config; /* 0x1F4 */ |
| 64 | u32 ecc_control; /* 0x1F8 */ |
| 65 | u32 ecc_size_config; /* 0x1FC */ |
| 66 | u32 ecc1_result; /* 0x200 */ |
| 67 | u32 ecc2_result; /* 0x204 */ |
| 68 | u32 ecc3_result; /* 0x208 */ |
| 69 | u32 ecc4_result; /* 0x20C */ |
| 70 | u32 ecc5_result; /* 0x210 */ |
| 71 | u32 ecc6_result; /* 0x214 */ |
| 72 | u32 ecc7_result; /* 0x218 */ |
| 73 | u32 ecc8_result; /* 0x21C */ |
| 74 | u32 ecc9_result; /* 0x220 */ |
| 75 | u8 res7[12]; /* 0x224 */ |
| 76 | u32 testmomde_ctrl; /* 0x230 */ |
| 77 | u8 res8[12]; /* 0x234 */ |
| 78 | struct bch_res_0_3 bch_result_0_3[2]; /* 0x240 */ |
| 79 | }; |
| 80 | |
| 81 | /* Used for board specific gpmc initialization */ |
| 82 | extern struct gpmc *gpmc_cfg; |
| 83 | |
| Andreas Bießmann | 9a48c5c | 2013-04-02 06:05:54 +0000 | [diff] [blame] | 84 | #endif /* __ASM_OMAP_GPMC_H */ |