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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Vladimir Barinov8c946272015-07-20 20:49:59 +03002/*
3 * include/configs/stout.h
4 * This file is Stout board configuration.
5 *
6 * Copyright (C) 2015 Renesas Electronics Europe GmbH
7 * Copyright (C) 2015 Renesas Electronics Corporation
8 * Copyright (C) 2015 Cogent Embedded, Inc.
Vladimir Barinov8c946272015-07-20 20:49:59 +03009 */
10
11#ifndef __STOUT_H
12#define __STOUT_H
13
Vladimir Barinov8c946272015-07-20 20:49:59 +030014#include "rcar-gen2-common.h"
15
Marek Vasut3320a222018-04-12 15:23:46 +020016#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
17#define STACK_AREA_SIZE 0x00100000
18#define LOW_LEVEL_MERAM_STACK \
Vladimir Barinov8c946272015-07-20 20:49:59 +030019 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
20
21/* MEMORY */
22#define RCAR_GEN2_SDRAM_BASE 0x40000000
23#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
24#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
25
26/* SCIF */
Vladimir Barinov8c946272015-07-20 20:49:59 +030027#define CONFIG_SCIF_A
28
29/* SPI */
Vladimir Barinov8c946272015-07-20 20:49:59 +030030#define CONFIG_SPI_FLASH_QUAD
Vladimir Barinov8c946272015-07-20 20:49:59 +030031
32/* SH Ether */
Vladimir Barinov8c946272015-07-20 20:49:59 +030033#define CONFIG_SH_ETHER_USE_PORT 0
34#define CONFIG_SH_ETHER_PHY_ADDR 0x1
35#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
Vladimir Barinov8c946272015-07-20 20:49:59 +030036#define CONFIG_SH_ETHER_CACHE_WRITEBACK
37#define CONFIG_SH_ETHER_CACHE_INVALIDATE
Marek Vasut3320a222018-04-12 15:23:46 +020038#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
Vladimir Barinov8c946272015-07-20 20:49:59 +030039#define CONFIG_BITBANGMII_MULTI
40
Vladimir Barinov8c946272015-07-20 20:49:59 +030041/* Board Clock */
42#define RMOBILE_XTAL_CLK 20000000u
43#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
Vladimir Barinov8c946272015-07-20 20:49:59 +030044
Marek Vasut3320a222018-04-12 15:23:46 +020045#define CONFIG_EXTRA_ENV_SETTINGS \
Marek Vasut4f34a4b2018-11-27 00:19:03 +010046 "bootm_size=0x10000000\0"
Vladimir Barinov8c946272015-07-20 20:49:59 +030047
Marek Vasut3320a222018-04-12 15:23:46 +020048/* SPL support */
Marek Vasut3320a222018-04-12 15:23:46 +020049#define CONFIG_SPL_STACK 0xe6340000
Marek Vasut9da67e32018-04-13 23:13:00 +020050#define CONFIG_SPL_MAX_SIZE 0x4000
Marek Vasut9da67e32018-04-13 23:13:00 +020051#ifdef CONFIG_SPL_BUILD
Marek Vasut3320a222018-04-12 15:23:46 +020052#define CONFIG_CONS_SCIFA0
53#define CONFIG_SH_SCIF_CLK_FREQ 52000000
54#endif
Vladimir Barinov8c946272015-07-20 20:49:59 +030055
56#endif /* __STOUT_H */