Chris Packham | 90b4a00 | 2019-04-13 20:21:18 +1200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | |
| 3 | #ifndef _CONFIG_DB_88F6281_BP_H |
| 4 | #define _CONFIG_DB_88F6281_BP_H |
| 5 | |
| 6 | /* |
| 7 | * High Level Configuration Options (easy to change) |
| 8 | */ |
| 9 | #define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ |
| 10 | #define CONFIG_KW88F6281 1 /* SOC Name */ |
| 11 | #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ |
| 12 | #define CONFIG_SYS_TCLK 166666667 |
| 13 | #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg |
Chris Packham | 90b4a00 | 2019-04-13 20:21:18 +1200 | [diff] [blame] | 14 | |
| 15 | /* additions for new ARM relocation support */ |
| 16 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 17 | |
| 18 | #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ |
| 19 | #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */ |
| 20 | #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ |
| 21 | #define CONFIG_KIRKWOOD_GPIO 1 |
| 22 | |
| 23 | /* |
| 24 | * NS16550 Configuration |
| 25 | */ |
| 26 | #define CONFIG_SYS_NS16550_SERIAL |
| 27 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 28 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK |
| 29 | #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE |
| 30 | |
| 31 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Chris Packham | 90b4a00 | 2019-04-13 20:21:18 +1200 | [diff] [blame] | 32 | |
| 33 | /* |
| 34 | * Environment variables configurations |
| 35 | */ |
| 36 | #define CONFIG_ENV_SPI_BUS 0 |
| 37 | #define CONFIG_ENV_SPI_CS 0 |
| 38 | #define CONFIG_ENV_SPI_MAX_HZ 20000000 /* 20Mhz */ |
| 39 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE |
Chris Packham | 90b4a00 | 2019-04-13 20:21:18 +1200 | [diff] [blame] | 40 | |
| 41 | /* |
| 42 | * U-Boot bootcode configuration |
| 43 | */ |
| 44 | |
| 45 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */ |
| 46 | #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4.0 MB for malloc */ |
| 47 | |
| 48 | /* |
| 49 | * For booting Linux, the board info and command line data |
| 50 | * have to be in the first 8 MB of memory, since this is |
| 51 | * the maximum mapped by the Linux kernel during initialization. |
| 52 | */ |
| 53 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ |
| 54 | |
| 55 | /* size in bytes reserved for initial data */ |
| 56 | |
| 57 | #include <asm/arch/config.h> |
| 58 | /* There is no PHY directly connected so don't ask it for link status */ |
| 59 | #undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
| 60 | |
| 61 | /* |
| 62 | * Other required minimal configurations |
| 63 | */ |
Chris Packham | 90b4a00 | 2019-04-13 20:21:18 +1200 | [diff] [blame] | 64 | #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
| 65 | |
| 66 | /* |
| 67 | * SDIO/MMC Card Configuration |
| 68 | */ |
| 69 | #ifdef CONFIG_CMD_MMC |
| 70 | #define CONFIG_MVEBU_MMC |
| 71 | #define CONFIG_SYS_MMC_BASE KW_SDIO_BASE |
| 72 | #endif /* CONFIG_CMD_MMC */ |
| 73 | |
| 74 | /* |
| 75 | * SATA Driver configuration |
| 76 | */ |
| 77 | #ifdef CONFIG_MVSATA_IDE |
| 78 | #define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET |
| 79 | #endif /*CONFIG_MVSATA_IDE*/ |
| 80 | |
| 81 | #define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */ |
| 82 | |
Chris Packham | 90b4a00 | 2019-04-13 20:21:18 +1200 | [diff] [blame] | 83 | #endif /* _CONFIG_DB_88F6281_BP_H */ |