Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / d5167d52f4932162ce4e7c28c02d71ac490afc0f / . / arch / arm / mach-uniphier / boards.c
blob: fba885971205e9a0c8ad9d493aeb858991331c9c [file] [log] [blame]
Masahiro Yamada75f16f82015-09-22 00:27:39 +0900[diff] [blame]1/*
2 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <libfdt.h>
8#include <linux/kernel.h>
9#include <mach/init.h>
10
11#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
12static const struct uniphier_board_data ph1_sld3_data = {
13 .dram_ch0_base = 0x80000000,
14 .dram_ch0_size = 0x20000000,
15 .dram_ch0_width = 32,
16 .dram_ch1_base = 0xc0000000,
17 .dram_ch1_size = 0x20000000,
18 .dram_ch1_width = 16,
19 .dram_ch2_base = 0xc0000000,
20 .dram_ch2_size = 0x10000000,
21 .dram_ch2_width = 16,
22 .dram_freq = 1600,
23};
24#endif
25
26#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
27static const struct uniphier_board_data ph1_ld4_data = {
28 .dram_ch0_base = 0x80000000,
29 .dram_ch0_size = 0x10000000,
30 .dram_ch0_width = 16,
31 .dram_ch1_base = 0x90000000,
32 .dram_ch1_size = 0x10000000,
33 .dram_ch1_width = 16,
34 .dram_freq = 1600,
35};
36#endif
37
38#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
39static const struct uniphier_board_data ph1_pro4_data = {
40 .dram_ch0_base = 0x80000000,
41 .dram_ch0_size = 0x20000000,
42 .dram_ch0_width = 32,
43 .dram_ch1_base = 0xa0000000,
44 .dram_ch1_size = 0x20000000,
45 .dram_ch1_width = 32,
46 .dram_freq = 1600,
47};
48#endif
49
50#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
51static const struct uniphier_board_data ph1_sld8_data = {
52 .dram_ch0_base = 0x80000000,
53 .dram_ch0_size = 0x10000000,
54 .dram_ch0_width = 16,
55 .dram_ch1_base = 0x90000000,
56 .dram_ch1_size = 0x10000000,
57 .dram_ch1_width = 16,
58 .dram_freq = 1333,
59};
60#endif
61
Masahiro Yamadad5167d52015-09-22 00:27:40 +0900[diff] [blame^]62#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5)
63static const struct uniphier_board_data ph1_pro5_data = {
64 .dram_ch0_base = 0x80000000,
65 .dram_ch0_size = 0x20000000,
66 .dram_ch0_width = 32,
67 .dram_ch1_base = 0xa0000000,
68 .dram_ch1_size = 0x20000000,
69 .dram_ch1_width = 32,
70 .dram_freq = 1866,
71};
72#endif
73
Masahiro Yamada75f16f82015-09-22 00:27:39 +0900[diff] [blame]74struct uniphier_board_id {
75 const char *compatible;
76 const struct uniphier_board_data *param;
77};
78
79static const struct uniphier_board_id uniphier_boards[] = {
80#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
81 { "socionext,ph1-sld3", &ph1_sld3_data, },
82#endif
83#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
84 { "socionext,ph1-ld4", &ph1_ld4_data, },
85#endif
86#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
87 { "socionext,ph1-pro4", &ph1_pro4_data, },
88#endif
89#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
90 { "socionext,ph1-sld8", &ph1_sld8_data, },
91#endif
Masahiro Yamadad5167d52015-09-22 00:27:40 +0900[diff] [blame^]92#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5)
93 { "socionext,ph1-pro5", &ph1_pro5_data, },
94#endif
Masahiro Yamada75f16f82015-09-22 00:27:39 +0900[diff] [blame]95};
96
97const struct uniphier_board_data *uniphier_get_board_param(const void *fdt)
98{
99 int i;
100
101 for (i = 0; i < ARRAY_SIZE(uniphier_boards); i++) {
102 if (!fdt_node_check_compatible(fdt, 0,
103 uniphier_boards[i].compatible))
104 return uniphier_boards[i].param;
105 }
106
107 return NULL;
108}