blob: 6b8b9f83e9fd7c54f5fc8b014dc72ddf4e3b91d8 [file] [log] [blame]
Michal Simek04b7e622015-01-15 10:01:51 +01001/*
2 * Configuration for Xilinx ZynqMP
3 * (C) Copyright 2014 - 2015 Xilinx, Inc.
4 * Michal Simek <michal.simek@xilinx.com>
5 *
6 * Based on Configuration for Versatile Express
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11#ifndef __XILINX_ZYNQMP_H
12#define __XILINX_ZYNQMP_H
13
14#define CONFIG_REMAKE_ELF
15
16/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */
17
18#define CONFIG_SYS_NO_FLASH
19
Michal Simek04b7e622015-01-15 10:01:51 +010020
21/* Generic Interrupt Controller Definitions */
22#define CONFIG_GICV2
23#define GICD_BASE 0xF9010000
24#define GICC_BASE 0xF9020000
25
26/* Physical Memory Map */
27#define CONFIG_NR_DRAM_BANKS 1
28#define CONFIG_SYS_SDRAM_BASE 0
29#define CONFIG_SYS_SDRAM_SIZE 0x40000000
30
31#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
32#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_SDRAM_SIZE
33
34/* Have release address at the end of 256MB for now */
35#define CPU_RELEASE_ADDR 0xFFFFFF0
36
37/* Cache Definitions */
Siva Durga Prasad Paladugua38e81e2014-12-06 12:57:51 +053038#define CONFIG_SYS_CACHELINE_SIZE 64
Michal Simek04b7e622015-01-15 10:01:51 +010039
40#define CONFIG_IDENT_STRING " Xilinx ZynqMP"
41
Michal Simek04b7e622015-01-15 10:01:51 +010042#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
43
44/* Flat Device Tree Definitions */
45#define CONFIG_OF_LIBFDT
46
47/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
48#define COUNTER_FREQUENCY 4000000
49
50/* Size of malloc() pool */
Siva Durga Prasad Paladuguba1f68e2015-08-04 13:03:26 +053051#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x2000000)
Michal Simek04b7e622015-01-15 10:01:51 +010052
53/* Serial setup */
Siva Durga Prasad Paladugu498382c2015-06-10 15:50:59 +053054#if defined(CONFIG_ZYNQMP_DCC)
55# define CONFIG_ARM_DCC
56# define CONFIG_CPU_ARMV8
57#else
Simon Glass23d9b622015-10-17 19:41:27 -060058# define CONFIG_ZYNQ_SERIAL
Siva Durga Prasad Paladugu498382c2015-06-10 15:50:59 +053059#endif
Michal Simek04b7e622015-01-15 10:01:51 +010060
61#define CONFIG_CONS_INDEX 0
62#define CONFIG_BAUDRATE 115200
63#define CONFIG_SYS_BAUDRATE_TABLE \
64 { 4800, 9600, 19200, 38400, 57600, 115200 }
65
66/* Command line configuration */
67#define CONFIG_CMD_ENV
68#define CONFIG_CMD_EXT2
69#define CONFIG_CMD_EXT4
70#define CONFIG_CMD_FAT
Siva Durga Prasad Paladugufacf7002015-03-13 17:43:49 +053071#define CONFIG_CMD_FS_GENERIC
Michal Simek04b7e622015-01-15 10:01:51 +010072#define CONFIG_DOS_PARTITION
Michal Simek58f865f2015-04-15 13:36:40 +020073#define CONFIG_MP
Michal Simek04b7e622015-01-15 10:01:51 +010074
Michal Simekc68918e2015-07-23 12:03:55 +020075#define CONFIG_CMD_MII
76
77/* BOOTP options */
78#define CONFIG_BOOTP_BOOTFILESIZE
79#define CONFIG_BOOTP_BOOTPATH
80#define CONFIG_BOOTP_GATEWAY
81#define CONFIG_BOOTP_HOSTNAME
82#define CONFIG_BOOTP_MAY_FAIL
83#define CONFIG_BOOTP_SERVERIP
84
Siva Durga Prasad Paladugu32b7dba2015-04-15 11:48:48 +053085/* SPI */
86#ifdef CONFIG_ZYNQ_SPI
Siva Durga Prasad Paladugu32b7dba2015-04-15 11:48:48 +053087# define CONFIG_CMD_SF
88#endif
89
Michal Simek04b7e622015-01-15 10:01:51 +010090#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
91# define CONFIG_MMC
92# define CONFIG_GENERIC_MMC
93# define CONFIG_SDHCI
94# define CONFIG_ZYNQ_SDHCI
95# define CONFIG_CMD_MMC
Michal Simek8bc78172015-09-29 01:27:13 +020096# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
97# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
98# endif
Michal Simek04b7e622015-01-15 10:01:51 +010099#endif
100
101#if defined(CONFIG_ZYNQ_SDHCI)
102# define CONFIG_FAT_WRITE
103# define CONFIG_CMD_EXT4_WRITE
104#endif
105
106/* Miscellaneous configurable options */
107#define CONFIG_SYS_LOAD_ADDR 0x8000000
108
Siva Durga Prasad Paladuguba1f68e2015-08-04 13:03:26 +0530109#if defined(CONFIG_ZYNQMP_USB)
110#define CONFIG_USB_DWC3
111#define CONFIG_USB_DWC3_GADGET
112
113#define CONFIG_USB_GADGET
114#define CONFIG_USB_GADGET_DOWNLOAD
115#define CONFIG_USB_GADGET_DUALSPEED
116#define CONFIG_USB_GADGET_VBUS_DRAW 2
117#define CONFIG_USBDOWNLOAD_GADGET
118#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
119#define DFU_DEFAULT_POLL_TIMEOUT 300
120#define CONFIG_USB_FUNCTION_DFU
121#define CONFIG_DFU_RAM
122#define CONFIG_G_DNL_VENDOR_NUM 0x03FD
123#define CONFIG_G_DNL_PRODUCT_NUM 0x0300
124#define CONFIG_G_DNL_MANUFACTURER "Xilinx"
125#define CONFIG_USB_CABLE_CHECK
126#define CONFIG_CMD_DFU
127#define CONFIG_CMD_THOR_DOWNLOAD
128#define CONFIG_USB_FUNCTION_THOR
129#define CONFIG_THOR_RESET_OFF
130#define DFU_ALT_INFO_RAM \
131 "dfu_ram_info=" \
132 "set dfu_alt_info " \
133 "Image ram 0x200000 0x1800000\\\\;" \
134 "system.dtb ram 0x7000000 0x40000\0" \
135 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
136 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
137
138#define DFU_ALT_INFO \
139 DFU_ALT_INFO_RAM
140#endif
141
142#if !defined(DFU_ALT_INFO)
143# define DFU_ALT_INFO
144#endif
145
Michal Simek04b7e622015-01-15 10:01:51 +0100146/* Initial environment variables */
147#define CONFIG_EXTRA_ENV_SETTINGS \
148 "kernel_addr=0x80000\0" \
149 "fdt_addr=0x7000000\0" \
150 "fdt_high=0x10000000\0" \
Siva Durga Prasad Paladugufacf7002015-03-13 17:43:49 +0530151 "sdboot=mmcinfo && load mmc 0:0 $fdt_addr system.dtb && " \
Siva Durga Prasad Paladuguba1f68e2015-08-04 13:03:26 +0530152 "load mmc 0:0 $kernel_addr Image && booti $kernel_addr - $fdt_addr\0" \
153 DFU_ALT_INFO
Michal Simek04b7e622015-01-15 10:01:51 +0100154
155#define CONFIG_BOOTARGS "setenv bootargs console=ttyPS0,${baudrate} " \
156 "earlycon=cdns,mmio,0xff000000,${baudrate}n8"
157#define CONFIG_PREBOOT "run bootargs"
158#define CONFIG_BOOTCOMMAND "run $modeboot"
159#define CONFIG_BOOTDELAY 5
160
161#define CONFIG_BOARD_LATE_INIT
162
163/* Do not preserve environment */
164#define CONFIG_ENV_IS_NOWHERE 1
165#define CONFIG_ENV_SIZE 0x1000
166
167/* Monitor Command Prompt */
168/* Console I/O Buffer Size */
169#define CONFIG_SYS_CBSIZE 2048
Michal Simek04b7e622015-01-15 10:01:51 +0100170#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
171 sizeof(CONFIG_SYS_PROMPT) + 16)
172#define CONFIG_SYS_HUSH_PARSER
173#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
174#define CONFIG_SYS_LONGHELP
175#define CONFIG_CMDLINE_EDITING
176#define CONFIG_SYS_MAXARGS 64
177
Michal Simekc68918e2015-07-23 12:03:55 +0200178/* Ethernet driver */
179#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) || \
180 defined(CONFIG_ZYNQ_GEM2) || defined(CONFIG_ZYNQ_GEM3)
181# define CONFIG_NET_MULTI
182# define CONFIG_ZYNQ_GEM
183# define CONFIG_MII
184# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
185# define CONFIG_PHYLIB
186# define CONFIG_PHY_MARVELL
Michal Simek1a113392015-11-10 10:48:05 +0100187# define CONFIG_PHY_TI
Michal Simekc68918e2015-07-23 12:03:55 +0200188#endif
189
Siva Durga Prasad Paladugu055792a2015-03-03 15:01:44 +0530190/* I2C */
191#if defined(CONFIG_SYS_I2C_ZYNQ)
192# define CONFIG_CMD_I2C
193# define CONFIG_SYS_I2C
194# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
195# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
196#endif
197
Siva Durga Prasad Paladugu055792a2015-03-03 15:01:44 +0530198/* EEPROM */
199#ifdef CONFIG_ZYNQMP_EEPROM
200# define CONFIG_CMD_EEPROM
201# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
202# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
203# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
204# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
205# define CONFIG_SYS_EEPROM_SIZE (64 * 1024)
206#endif
207
Michal Simekb216cc12015-07-23 13:27:40 +0200208#ifdef CONFIG_AHCI
209#define CONFIG_LIBATA
210#define CONFIG_SCSI_AHCI
211#define CONFIG_SCSI_AHCI_PLAT
212#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
213#define CONFIG_SYS_SCSI_MAX_LUN 1
214#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
215 CONFIG_SYS_SCSI_MAX_LUN)
216#define CONFIG_CMD_SCSI
217#endif
218
Michal Simek04b7e622015-01-15 10:01:51 +0100219#define CONFIG_FIT
220#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
221
222#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
223
224#define CONFIG_CMD_BOOTI
225#define CONFIG_CMD_UNZIP
226
227#define CONFIG_BOARD_EARLY_INIT_R
228#define CONFIG_CLOCKS
229
230#endif /* __XILINX_ZYNQMP_H */