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Sughosh Ganu1b9c52b2010-11-30 11:25:01 -05001/*
2 * DaVinci pinmux functions.
3 *
4 * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
5 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
7 * Copyright (C) 2004 Texas Instruments.
8 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
Sughosh Ganu1b9c52b2010-11-30 11:25:01 -050010 */
11
12#include <common.h>
13#include <asm/arch/hardware.h>
14#include <asm/io.h>
15#include <asm/arch/davinci_misc.h>
16
17/*
18 * Change the setting of a pin multiplexer field.
19 *
20 * Takes an array of pinmux settings similar to:
21 *
22 * struct pinmux_config uart_pins[] = {
23 * { &davinci_syscfg_regs->pinmux[8], 2, 7 },
24 * { &davinci_syscfg_regs->pinmux[9], 2, 0 }
25 * };
26 *
27 * Stepping through the array, each pinmux[n] register has the given value
28 * set in the pin mux field specified.
29 *
30 * The number of pins in the array must be passed (ARRAY_SIZE can provide
31 * this value conveniently).
32 *
33 * Returns 0 if all field numbers and values are in the correct range,
34 * else returns -1.
35 */
36int davinci_configure_pin_mux(const struct pinmux_config *pins,
37 const int n_pins)
38{
39 int i;
40
41 /* check for invalid pinmux values */
42 for (i = 0; i < n_pins; i++) {
43 if (pins[i].field >= PIN_MUX_NUM_FIELDS ||
44 (pins[i].value & ~PIN_MUX_FIELD_MASK) != 0)
45 return -1;
46 }
47
48 /* configure the pinmuxes */
49 for (i = 0; i < n_pins; i++) {
50 const int offset = pins[i].field * PIN_MUX_FIELD_SIZE;
51 const unsigned int value = pins[i].value << offset;
52 const unsigned int mask = PIN_MUX_FIELD_MASK << offset;
53 const dv_reg *mux = pins[i].mux;
54
55 writel(value | (readl(mux) & (~mask)), mux);
56 }
57
58 return 0;
59}
60
61/*
62 * Configure multiple pinmux resources.
63 *
64 * Takes an pinmux_resource array of pinmux_config and pin counts:
65 *
66 * const struct pinmux_resource pinmuxes[] = {
67 * PINMUX_ITEM(uart_pins),
68 * PINMUX_ITEM(i2c_pins),
69 * };
70 *
71 * The number of items in the array must be passed (ARRAY_SIZE can provide
72 * this value conveniently).
73 *
74 * Each item entry is configured in the defined order. If configuration
75 * of any item fails, -1 is returned and none of the following items are
76 * configured. On success, 0 is returned.
77 */
78int davinci_configure_pin_mux_items(const struct pinmux_resource *item,
79 const int n_items)
80{
81 int i;
82
83 for (i = 0; i < n_items; i++) {
84 if (davinci_configure_pin_mux(item[i].pins,
85 item[i].n_pins) != 0)
86 return -1;
87 }
88
89 return 0;
90}