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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Eric Nelson4c644792017-12-11 13:52:11 -02002/*
Eric Nelsone6e37e32018-01-18 08:36:26 -07003 * Copyright (C) 2010-2018 Freescale Semiconductor, Inc.
Eric Nelson4c644792017-12-11 13:52:11 -02004 *
Eric Nelsone6e37e32018-01-18 08:36:26 -07005 * Configuration settings for the virtual mx6memcal board.
Eric Nelson4c644792017-12-11 13:52:11 -02006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/* SPL */
12
13#include "mx6_common.h"
14#include "imx6_spl.h"
15
Eric Nelson4c644792017-12-11 13:52:11 -020016#ifdef CONFIG_SERIAL_CONSOLE_UART1
17#if defined(CONFIG_MX6SL)
18#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
19#else
20#define CONFIG_MXC_UART_BASE UART1_BASE
21#endif
22#elif defined(CONFIG_SERIAL_CONSOLE_UART2)
23#define CONFIG_MXC_UART_BASE UART2_BASE
24#else
25#error please define serial console (CONFIG_SERIAL_CONSOLE_UARTx)
26#endif
Eric Nelson4c644792017-12-11 13:52:11 -020027
28#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16)
29
30/* Physical Memory Map */
Eric Nelson4c644792017-12-11 13:52:11 -020031#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
32
33#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
34#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
35#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
36
37#define CONFIG_SYS_INIT_SP_OFFSET \
38 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
39#define CONFIG_SYS_INIT_SP_ADDR \
40 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
41
Eric Nelson2e366b22018-01-18 07:47:32 -070042#define CONFIG_MXC_USB_PORTSC PORT_PTS_UTMI
43
Eric Nelson4c644792017-12-11 13:52:11 -020044#endif /* __CONFIG_H */