Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2006 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de |
| 5 | * |
| 6 | * Copyright 2009 Freescale Semiconductor, Inc. |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 7 | */ |
| 8 | |
Masahiro Yamada | cd1b58e | 2014-04-28 10:17:10 +0900 | [diff] [blame] | 9 | #include "config.h" |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 10 | |
| 11 | OUTPUT_ARCH(powerpc) |
Ying Zhang | 0d4f544 | 2013-05-20 14:07:23 +0800 | [diff] [blame] | 12 | #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC |
| 13 | PHDRS |
| 14 | { |
| 15 | text PT_LOAD; |
| 16 | bss PT_LOAD; |
| 17 | } |
| 18 | #endif |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 19 | SECTIONS |
| 20 | { |
Pali Rohár | d61e3c2 | 2022-04-05 15:12:35 +0200 | [diff] [blame] | 21 | /* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */ |
| 22 | #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC |
| 23 | .bootpg IMAGE_TEXT_BASE - 0x1000 : |
| 24 | { |
| 25 | KEEP(*(.bootpg)) |
| 26 | } :text = 0xffff |
| 27 | #endif |
Tom Rini | 2aaa27d | 2019-01-22 17:09:26 -0500 | [diff] [blame] | 28 | . = IMAGE_TEXT_BASE; |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 29 | .text : { |
| 30 | *(.text*) |
| 31 | } |
| 32 | _etext = .; |
| 33 | |
| 34 | .reloc : { |
| 35 | _GOT2_TABLE_ = .; |
| 36 | KEEP(*(.got2)) |
| 37 | KEEP(*(.got)) |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 38 | _FIXUP_TABLE_ = .; |
| 39 | KEEP(*(.fixup)) |
| 40 | } |
| 41 | __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; |
| 42 | __fixup_entries = (. - _FIXUP_TABLE_) >> 2; |
| 43 | |
| 44 | . = ALIGN(8); |
| 45 | .data : { |
| 46 | *(.rodata*) |
| 47 | *(.data*) |
| 48 | *(.sdata*) |
| 49 | } |
| 50 | _edata = .; |
| 51 | |
Ying Zhang | 4393f95 | 2013-09-04 17:03:45 +0800 | [diff] [blame] | 52 | . = ALIGN(4); |
Andrew Scull | 5a9095c | 2022-05-30 10:00:04 +0000 | [diff] [blame] | 53 | __u_boot_list : { |
| 54 | KEEP(*(SORT(__u_boot_list*))); |
Ying Zhang | 4393f95 | 2013-09-04 17:03:45 +0800 | [diff] [blame] | 55 | } |
| 56 | |
Ying Zhang | 9ff7026 | 2013-08-16 15:16:11 +0800 | [diff] [blame] | 57 | . = .; |
| 58 | __start___ex_table = .; |
| 59 | __ex_table : { *(__ex_table) } |
| 60 | __stop___ex_table = .; |
| 61 | |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 62 | . = ALIGN(8); |
| 63 | __init_begin = .; |
| 64 | __init_end = .; |
Jagdish Gediya | 910e1ae | 2018-09-03 21:35:05 +0530 | [diff] [blame] | 65 | _end = .; |
Prabhakar Kushwaha | 6e2b9a3 | 2014-04-08 19:12:31 +0530 | [diff] [blame] | 66 | #ifdef CONFIG_SPL_SKIP_RELOCATE |
| 67 | . = ALIGN(4); |
| 68 | __bss_start = .; |
| 69 | .bss : { |
| 70 | *(.sbss*) |
| 71 | *(.bss*) |
| 72 | } |
| 73 | . = ALIGN(4); |
| 74 | __bss_end = .; |
| 75 | #endif |
Po Liu | f6facca | 2014-01-10 10:10:58 +0800 | [diff] [blame] | 76 | |
Pali Rohár | d61e3c2 | 2022-04-05 15:12:35 +0200 | [diff] [blame] | 77 | /* For nor and nand is needed the SPL with section .resetvec */ |
| 78 | #ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 79 | #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ |
Prabhakar Kushwaha | a7eb72b | 2014-04-08 19:12:19 +0530 | [diff] [blame] | 80 | #ifndef BOOT_PAGE_OFFSET |
| 81 | #define BOOT_PAGE_OFFSET 0x1000 |
| 82 | #endif |
Pali Rohár | d61e3c2 | 2022-04-05 15:12:35 +0200 | [diff] [blame] | 83 | .bootpg IMAGE_TEXT_BASE + BOOT_PAGE_OFFSET : |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 84 | { |
Prabhakar Kushwaha | ab4ab01 | 2013-04-16 13:27:59 +0530 | [diff] [blame] | 85 | arch/powerpc/cpu/mpc85xx/start.o (.bootpg) |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 86 | } |
Prabhakar Kushwaha | a7eb72b | 2014-04-08 19:12:19 +0530 | [diff] [blame] | 87 | #ifndef RESET_VECTOR_OFFSET |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 88 | #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ |
Prabhakar Kushwaha | a7eb72b | 2014-04-08 19:12:19 +0530 | [diff] [blame] | 89 | #endif |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 90 | #elif defined(CONFIG_FSL_ELBC) |
| 91 | #define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */ |
| 92 | #else |
| 93 | #error unknown NAND controller |
| 94 | #endif |
Pali Rohár | d61e3c2 | 2022-04-05 15:12:35 +0200 | [diff] [blame] | 95 | .resetvec IMAGE_TEXT_BASE + RESET_VECTOR_OFFSET : { |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 96 | KEEP(*(.resetvec)) |
| 97 | } = 0xffff |
Ying Zhang | 0d4f544 | 2013-05-20 14:07:23 +0800 | [diff] [blame] | 98 | #endif |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 99 | |
Prabhakar Kushwaha | 6e2b9a3 | 2014-04-08 19:12:31 +0530 | [diff] [blame] | 100 | #ifndef CONFIG_SPL_SKIP_RELOCATE |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 101 | /* |
| 102 | * Make sure that the bss segment isn't linked at 0x0, otherwise its |
| 103 | * address won't be updated during relocation fixups. |
| 104 | */ |
| 105 | . |= 0x10; |
| 106 | |
Ying Zhang | 5ca62f2 | 2013-06-07 17:25:16 +0800 | [diff] [blame] | 107 | . = ALIGN(4); |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 108 | __bss_start = .; |
| 109 | .bss : { |
| 110 | *(.sbss*) |
| 111 | *(.bss*) |
| 112 | } |
Ying Zhang | 5ca62f2 | 2013-06-07 17:25:16 +0800 | [diff] [blame] | 113 | . = ALIGN(4); |
Simon Glass | ed70c8f | 2013-03-14 06:54:53 +0000 | [diff] [blame] | 114 | __bss_end = .; |
Prabhakar Kushwaha | 6e2b9a3 | 2014-04-08 19:12:31 +0530 | [diff] [blame] | 115 | #endif |
Scott Wood | 095b712 | 2012-09-20 19:02:18 -0500 | [diff] [blame] | 116 | } |