Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Embest/Timll DevKit3250 board configuration file |
| 4 | * |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 5 | * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com> |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_DEVKIT3250_H__ |
| 9 | #define __CONFIG_DEVKIT3250_H__ |
| 10 | |
| 11 | /* SoC and board defines */ |
Alexey Brodkin | 267d8e2 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 12 | #include <linux/sizes.h> |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 13 | #include <asm/arch/cpu.h> |
| 14 | |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 15 | /* |
| 16 | * Memory configurations |
| 17 | */ |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 18 | #define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE |
| 19 | #define CFG_SYS_SDRAM_SIZE SZ_64M |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 20 | |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 21 | /* |
Vladimir Zapolskiy | 936c200 | 2015-12-19 23:41:23 +0200 | [diff] [blame] | 22 | * DMA |
| 23 | */ |
Vladimir Zapolskiy | 936c200 | 2015-12-19 23:41:23 +0200 | [diff] [blame] | 24 | |
| 25 | /* |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 26 | * GPIO |
| 27 | */ |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 28 | |
| 29 | /* |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 30 | * NOR Flash |
| 31 | */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 32 | #define CFG_SYS_FLASH_BASE EMC_CS0_BASE |
| 33 | #define CFG_SYS_FLASH_SIZE SZ_4M |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 34 | |
| 35 | /* |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 36 | * NAND controller |
| 37 | */ |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 38 | #define CFG_SYS_NAND_BASE SLC_NAND_BASE |
| 39 | #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 40 | |
| 41 | /* |
| 42 | * NAND chip timings |
| 43 | */ |
| 44 | #define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 14 |
| 45 | #define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666 |
| 46 | #define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000 |
| 47 | #define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000 |
Tom Rini | 16fb9f8 | 2022-12-04 10:04:41 -0500 | [diff] [blame^] | 48 | #define CFG_LPC32XX_NAND_SLC_RDR_CLKS 14 |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 49 | #define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666 |
| 50 | #define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000 |
| 51 | #define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000 |
| 52 | |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 53 | /* |
Vladimir Zapolskiy | 936c200 | 2015-12-19 23:41:23 +0200 | [diff] [blame] | 54 | * USB |
| 55 | */ |
Vladimir Zapolskiy | 936c200 | 2015-12-19 23:41:23 +0200 | [diff] [blame] | 56 | #define CONFIG_USB_ISP1301_I2C_ADDR 0x2d |
Vladimir Zapolskiy | 936c200 | 2015-12-19 23:41:23 +0200 | [diff] [blame] | 57 | |
| 58 | /* |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 59 | * U-Boot General Configurations |
| 60 | */ |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 61 | |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 62 | /* |
| 63 | * Pass open firmware flat tree |
| 64 | */ |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 65 | |
| 66 | /* |
| 67 | * Environment |
| 68 | */ |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 69 | |
Tom Rini | c9edebe | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 70 | #define CFG_EXTRA_ENV_SETTINGS \ |
Vladimir Zapolskiy | 3704e43 | 2015-07-18 01:47:10 +0300 | [diff] [blame] | 71 | "ethaddr=00:01:90:00:C0:81\0" \ |
| 72 | "dtbaddr=0x81000000\0" \ |
| 73 | "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \ |
| 74 | "tftpdir=vladimir/oe/devkit3250\0" \ |
| 75 | "userargs=oops=panic\0" |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 76 | |
| 77 | /* |
| 78 | * U-Boot Commands |
| 79 | */ |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 80 | |
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 81 | /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_TEXT_BASE */ |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 82 | #define CFG_SYS_NAND_U_BOOT_SIZE 0x60000 |
Vladimir Zapolskiy | 89f86a2 | 2015-07-18 01:47:11 +0300 | [diff] [blame] | 83 | |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 84 | #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE |
| 85 | #define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE |
Vladimir Zapolskiy | 89f86a2 | 2015-07-18 01:47:11 +0300 | [diff] [blame] | 86 | |
| 87 | /* See common/spl/spl.c spl_set_header_raw_uboot() */ |
Vladimir Zapolskiy | 89f86a2 | 2015-07-18 01:47:11 +0300 | [diff] [blame] | 88 | |
| 89 | /* |
Vladimir Zapolskiy | 3ed0fcf | 2012-04-19 04:33:10 +0000 | [diff] [blame] | 90 | * Include SoC specific configuration |
| 91 | */ |
| 92 | #include <asm/arch/config.h> |
| 93 | |
| 94 | #endif /* __CONFIG_DEVKIT3250_H__*/ |