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git01.mediatek.com / filogic / uboot / 169703895d3be47e68eca38b47639c870aeeef23 / . / configs / kontron_sl28_defconfig
blob: 9112956e07097fc5cafe839efec616b19df298f6 [file] [log] [blame]
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]1CONFIG_ARM=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]2CONFIG_COUNTER_FREQUENCY=25000000
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]3CONFIG_TARGET_SL28=y
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x202000
5CONFIG_SYS_MALLOC_F_LEN=0x4000
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]8CONFIG_NR_DRAM_BANKS=2
9CONFIG_ENV_SIZE=0x2000
10CONFIG_ENV_OFFSET=0x3e0000
11CONFIG_ENV_SECT_SIZE=0x10000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-kontron-sl28"
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]13CONFIG_SPL_TEXT_BASE=0x18010000
14CONFIG_SYS_FSL_SDHC_CLK_DIV=1
Michael Wallebf9c73c2022-08-23 11:30:15 +0200[diff] [blame]15CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]16CONFIG_SPL_SERIAL=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]17CONFIG_SPL_SIZE_LIMIT=0x20000
18CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x0
19CONFIG_SPL=y
20CONFIG_ENV_OFFSET_REDUND=0x3f0000
21CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]22CONFIG_SPL_SPI=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]23# CONFIG_PSCI_RESET is not set
Michael Walle187bae92022-04-25 09:25:08 +0530[diff] [blame]24CONFIG_ARMV8_PSCI=y
25CONFIG_ARMV8_PSCI_RELOCATE=y
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]26CONFIG_SYS_LOAD_ADDR=0x82000000
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]27CONFIG_AHCI=y
Tom Rinibc7b0df2022-07-31 21:08:27 -0400[diff] [blame]28CONFIG_SYS_FSL_NUM_CC_PLLS=3
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]29CONFIG_DISTRO_DEFAULTS=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]30CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
31CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800eff0
Tom Rini5ca768d2022-01-24 21:08:41 +0000[diff] [blame]32CONFIG_MP=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]33CONFIG_FIT=y
34CONFIG_SPL_LOAD_FIT=y
35# CONFIG_USE_SPL_FIT_GENERATOR is not set
36CONFIG_OF_BOARD_SETUP=y
37CONFIG_OF_STDOUT_VIA_ALIAS=y
38CONFIG_BOOTDELAY=10
39CONFIG_USE_BOOTARGS=y
40CONFIG_BOARD_LATE_INIT=y
41CONFIG_PCI_INIT_R=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]42CONFIG_SPL_MAX_SIZE=0x20000
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]43CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
44CONFIG_SPL_BSS_START_ADDR=0x80100000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]45CONFIG_SPL_BSS_MAX_SIZE=0x100000
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]46CONFIG_SPL_BOARD_INIT=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]47# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
48CONFIG_SPL_STACK=0x18009ff0
Tom Rini166e3222022-05-27 12:48:32 -0400[diff] [blame]49CONFIG_SYS_SPL_MALLOC=y
Michael Wallebf9c73c2022-08-23 11:30:15 +0200[diff] [blame]50CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
51CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x900
Simon Glass64571062021-08-08 12:20:16 -0600[diff] [blame]52CONFIG_SPL_MPC8XXX_INIT_DDR=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]53CONFIG_SPL_SPI_LOAD=y
Tom Rini16970382022-09-19 11:22:26 -0400[diff] [blame^]54CONFIG_CMDLINE_PS_SUPPORT=y
Tom Riniae17fa32022-05-11 18:01:06 -0400[diff] [blame]55CONFIG_SYS_CBSIZE=256
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]56CONFIG_SYS_PBSIZE=276
Tom Rinif3c2f992022-06-25 19:29:46 -0400[diff] [blame]57CONFIG_SYS_BOOTM_LEN=0x800000
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]58CONFIG_CMD_ASKENV=y
59CONFIG_CMD_GREPENV=y
60CONFIG_CMD_NVEDIT_EFI=y
Michael Wallee449f352021-10-15 15:15:25 +0200[diff] [blame]61CONFIG_CMD_DFU=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]62CONFIG_CMD_DM=y
Michael Walle7832e172021-11-15 23:45:47 +0100[diff] [blame]63CONFIG_CMD_GPIO=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]64CONFIG_CMD_GPT=y
65CONFIG_CMD_I2C=y
66CONFIG_CMD_MMC=y
67CONFIG_CMD_PCI=y
68CONFIG_CMD_USB=y
Michael Wallee449f352021-10-15 15:15:25 +0200[diff] [blame]69CONFIG_CMD_USB_MASS_STORAGE=y
Michael Walle7832e172021-11-15 23:45:47 +0100[diff] [blame]70CONFIG_CMD_WDT=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]71CONFIG_CMD_CACHE=y
72CONFIG_CMD_EFIDEBUG=y
73CONFIG_CMD_RNG=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]74CONFIG_OF_CONTROL=y
75CONFIG_SPL_OF_CONTROL=y
Michael Wallefb559062022-02-25 18:21:56 +0530[diff] [blame]76CONFIG_OF_LIST="fsl-ls1028a-kontron-sl28 fsl-ls1028a-kontron-sl28-var1 fsl-ls1028a-kontron-sl28-var2 fsl-ls1028a-kontron-sl28-var3 fsl-ls1028a-kontron-sl28-var4"
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]77CONFIG_ENV_OVERWRITE=y
78CONFIG_ENV_IS_IN_SPI_FLASH=y
79CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rinif9d5e832022-03-18 08:38:25 -0400[diff] [blame]80CONFIG_SYS_RX_ETH_BUFFER=8
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]81CONFIG_SPL_DM_SEQ_ALIAS=y
Simon Glass701ef062022-01-31 07:49:33 -0700[diff] [blame]82CONFIG_SATA=y
Tom Rinif4e64b92022-02-08 23:50:55 +0000[diff] [blame]83CONFIG_SCSI_AHCI=y
Michael Walle101410e2021-01-08 00:08:59 +0100[diff] [blame]84CONFIG_SATA_CEVA=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]85CONFIG_FSL_CAAM=y
86CONFIG_SYS_FSL_DDR3=y
Tom Rini468c2d52021-08-21 13:50:18 -0400[diff] [blame]87CONFIG_DDR_ECC=y
88CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Michael Walle0b132092021-11-09 14:48:51 +0530[diff] [blame]89CONFIG_DFU_MMC=y
90CONFIG_DFU_SF=y
Michael Walle7832e172021-11-15 23:45:47 +0100[diff] [blame]91CONFIG_SL28CPLD_GPIO=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]92CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]93CONFIG_I2C_MUX=y
Michael Walle7832e172021-11-15 23:45:47 +0100[diff] [blame]94CONFIG_SL28CPLD=y
Michael Walle44804c02021-03-17 15:01:38 +0100[diff] [blame]95CONFIG_MMC_HS400_SUPPORT=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]96CONFIG_FSL_ESDHC=y
97CONFIG_FSL_ESDHC_SUPPORT_ADMA2=y
Michael Walle2fcd04d2020-12-09 10:53:26 +0100[diff] [blame]98# CONFIG_SPI_FLASH_UNLOCK_ALL is not set
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]99CONFIG_SPI_FLASH_WINBOND=y
100# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
101CONFIG_PHYLIB=y
102CONFIG_PHY_ATHEROS=y
Tom Rinib1607c82021-03-02 09:36:23 -0500[diff] [blame]103CONFIG_PHY_FIXED=y
Tom Rinib1607c82021-03-02 09:36:23 -0500[diff] [blame]104CONFIG_DM_DSA=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]105CONFIG_PHY_GIGE=y
106CONFIG_E1000=y
Alex Margineane068a482021-01-25 14:23:57 +0200[diff] [blame]107CONFIG_MSCC_FELIX_SWITCH=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]108CONFIG_NVME_PCI=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]109CONFIG_PCIE_ECAM_GENERIC=y
110CONFIG_PCIE_LAYERSCAPE_RC=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]111CONFIG_RTC_RV8803=y
112CONFIG_SCSI=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]113CONFIG_SYS_NS16550=y
114CONFIG_SPI=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]115CONFIG_FSL_DSPI=y
116CONFIG_NXP_FSPI=y
117CONFIG_USB=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]118# CONFIG_SPL_DM_USB is not set
Michael Wallee449f352021-10-15 15:15:25 +0200[diff] [blame]119CONFIG_DM_USB_GADGET=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]120CONFIG_USB_XHCI_HCD=y
Michael Wallef55d4cc2021-10-15 15:15:24 +0200[diff] [blame]121# CONFIG_USB_XHCI_FSL is not set
122CONFIG_USB_DWC3=y
123CONFIG_USB_DWC3_LAYERSCAPE=y
Michael Wallee449f352021-10-15 15:15:25 +0200[diff] [blame]124CONFIG_USB_GADGET=y
125CONFIG_USB_GADGET_DOWNLOAD=y
Michael Walle7832e172021-11-15 23:45:47 +0100[diff] [blame]126# CONFIG_WATCHDOG is not set
127# CONFIG_WATCHDOG_AUTOSTART is not set
128CONFIG_WDT=y
129CONFIG_WDT_SL28CPLD=y
Michael Walle05deab52021-11-15 23:45:48 +0100[diff] [blame]130CONFIG_WDT_SP805=y
Michael Walle36ba7642020-10-15 23:08:57 +0200[diff] [blame]131CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
132CONFIG_OF_LIBFDT_OVERLAY=y
Michael Walle54700a22021-09-29 13:39:09 +0200[diff] [blame]133CONFIG_EFI_SET_TIME=y
Michael Walle0b132092021-11-09 14:48:51 +0530[diff] [blame]134CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
Michael Walle0b132092021-11-09 14:48:51 +0530[diff] [blame]135CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y