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Pali Rohár248ef0a2012-10-29 07:54:01 +00001/*
2 * (C) Copyright 2011-2012
3 * Pali Rohár <pali.rohar@gmail.com>
4 *
5 * (C) Copyright 2010
6 * Alistair Buxton <a.j.buxton@gmail.com>
7 *
8 * Derived from Beagle Board code:
9 * (C) Copyright 2006-2008
10 * Texas Instruments.
11 * Richard Woodruff <r-woodruff2@ti.com>
12 * Syed Mohammed Khasim <x0khasim@ti.com>
13 *
14 * Configuration settings for the Nokia RX-51 aka N900.
15 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020016 * SPDX-License-Identifier: GPL-2.0+
Pali Rohár248ef0a2012-10-29 07:54:01 +000017 */
18
19#ifndef __CONFIG_H
20#define __CONFIG_H
21
22/*
23 * High Level Configuration Options
24 */
25
26#define CONFIG_OMAP /* in a TI OMAP core */
Pali Rohár248ef0a2012-10-29 07:54:01 +000027#define CONFIG_OMAP3430 /* which is in a 3430 */
28#define CONFIG_OMAP3_RX51 /* working with RX51 */
29#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
Lokesh Vutla56055052013-07-30 11:36:30 +053030#define CONFIG_OMAP_COMMON
Pali Rohára4b58bc2015-01-15 10:26:36 +010031#define CONFIG_SYS_GENERIC_BOARD
Pali Rohár248ef0a2012-10-29 07:54:01 +000032
33#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
34
35/*
36 * Nokia X-Loader loading secondary image to address 0x80400000
37 * NOLO loading boot image to random place, so it doesn't really
38 * matter what we set this to. We have to copy u-boot to this address
39 */
40#define CONFIG_SYS_TEXT_BASE 0x80008000
41
42#define CONFIG_SDRC /* The chip has SDRC controller */
43
44#include <asm/arch/cpu.h> /* get chip and board defs */
45#include <asm/arch/omap3.h>
46#include <asm/arch/mem.h>
47#include <linux/stringify.h>
48
49/*
50 * Display CPU and Board information
51 */
52#define CONFIG_DISPLAY_CPUINFO
53#define CONFIG_DISPLAY_BOARDINFO
54
55/* Clock Defines */
56#define V_OSCK 26000000 /* Clock output from T2 */
57#define V_SCLK (V_OSCK >> 1)
58
59#undef CONFIG_USE_IRQ /* no support for IRQs */
60#define CONFIG_MISC_INIT_R
61#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
62
63#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
64#define CONFIG_INITRD_TAG /* enable passing initrd */
65#define CONFIG_REVISION_TAG /* enable passing revision tag*/
66#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
67
68/*
69 * Size of malloc() pool
70 */
71#define CONFIG_ENV_SIZE (128 << 10)
72#define CONFIG_UBI_SIZE (512 << 10)
73#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
74 (128 << 10))
75
76/*
77 * Hardware drivers
78 */
79
80/*
81 * NS16550 Configuration
82 */
83#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
84
85#define CONFIG_SYS_NS16550
86#define CONFIG_SYS_NS16550_SERIAL
87#define CONFIG_SYS_NS16550_REG_SIZE (-4)
88#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
89
90/*
91 * select serial console configuration
92 */
93#define CONFIG_CONS_INDEX 3
94#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
95#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */
96
97/* allow to overwrite serial and ethaddr */
98#define CONFIG_ENV_OVERWRITE
99#define CONFIG_BAUDRATE 115200
100#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
101#define CONFIG_MMC
102#define CONFIG_GENERIC_MMC
103#define CONFIG_OMAP_HSMMC
104#define CONFIG_DOS_PARTITION
105
106/* USB */
107#define CONFIG_MUSB_UDC
108#define CONFIG_MUSB_HDC
109#define CONFIG_USB_OMAP3
110#define CONFIG_TWL4030_USB
111
112/* USB device configuration */
113#define CONFIG_USB_DEVICE
114#define CONFIG_USBD_VENDORID 0x0421
115#define CONFIG_USBD_PRODUCTID 0x01c8
116#define CONFIG_USBD_MANUFACTURER "Nokia"
117#define CONFIG_USBD_PRODUCT_NAME "N900"
118
119#define CONFIG_SYS_CONSOLE_IS_IN_ENV
120#define CONFIG_SYS_NO_FLASH
121
122/* commands to include */
123#include <config_cmd_default.h>
124
125#define CONFIG_CMD_EXT2 /* EXT2 Support */
126#define CONFIG_CMD_EXT4 /* EXT4 Support */
127#define CONFIG_CMD_FAT /* FAT support */
128
129#define CONFIG_CMD_I2C /* I2C serial bus support */
130#define CONFIG_CMD_MMC /* MMC support */
131#define CONFIG_CMD_GPIO /* Enable gpio command */
132
133#define CONFIG_CMDLINE_EDITING /* add command line history */
134#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
135
Pali Rohár13eb3e42013-03-07 05:15:19 +0000136#define CONFIG_CMD_BOOTMENU /* ANSI terminal Boot Menu */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000137#define CONFIG_CMD_CLEAR /* ANSI terminal clear screen command */
138
139#ifdef ONENAND_SUPPORT
140
141#define CONFIG_CMD_ONENAND /* ONENAND support */
142#define CONFIG_CMD_MTDPARTS /* mtd parts support */
143
144#ifdef UBIFS_SUPPORT
145#define CONFIG_CMD_UBI /* UBI Support */
146#define CONFIG_CMD_UBIFS /* UBIFS Support */
147#endif
148
149#endif
150
151/* commands not needed from config_cmd_default.h */
152#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
153#undef CONFIG_CMD_IMI /* iminfo */
154#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
155#undef CONFIG_CMD_NFS /* NFS support */
156#undef CONFIG_CMD_SAVEENV /* saveenv */
157#undef CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
158
159#define CONFIG_OMAP3_SPI
Heiko Schocherf53f2b82013-10-22 11:03:18 +0200160#define CONFIG_SYS_I2C
161#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
162#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
163#define CONFIG_SYS_I2C_OMAP34XX
Pali Rohár248ef0a2012-10-29 07:54:01 +0000164
165/*
166 * TWL4030
167 */
168#define CONFIG_TWL4030_POWER
169#define CONFIG_TWL4030_LED
170#define CONFIG_TWL4030_KEYPAD
171
172#define CONFIG_OMAP_GPIO
173#define GPIO_SLIDE 71
174
175/*
176 * Board ONENAND Info.
177 */
178
179#define PART1_NAME "bootloader"
180#define PART1_SIZE 128
181#define PART1_MULL 1024
182#define PART1_SUFF "k"
183#define PART1_OFFS 0x00000000
184#define PART1_MASK 0x00000003
185
186#define PART2_NAME "config"
187#define PART2_SIZE 384
188#define PART2_MULL 1024
189#define PART2_SUFF "k"
190#define PART2_OFFS 0x00020000
191#define PART2_MASK 0x00000000
192
193#define PART3_NAME "log"
194#define PART3_SIZE 256
195#define PART3_MULL 1024
196#define PART3_SUFF "k"
197#define PART3_OFFS 0x00080000
198#define PART3_MASK 0x00000000
199
200#define PART4_NAME "kernel"
201#define PART4_SIZE 2
202#define PART4_MULL 1024*1024
203#define PART4_SUFF "m"
204#define PART4_OFFS 0x000c0000
205#define PART4_MASK 0x00000000
206
207#define PART5_NAME "initfs"
208#define PART5_SIZE 2
209#define PART5_MULL 1024*1024
210#define PART5_SUFF "m"
211#define PART5_OFFS 0x002c0000
212#define PART5_MASK 0x00000000
213
214#define PART6_NAME "rootfs"
215#define PART6_SIZE 257280
216#define PART6_MULL 1024
217#define PART6_SUFF "k"
218#define PART6_OFFS 0x004c0000
219#define PART6_MASK 0x00000000
220
221#ifdef ONENAND_SUPPORT
222
Pali Rohár248ef0a2012-10-29 07:54:01 +0000223#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
224#define CONFIG_MTD_DEVICE
225#define CONFIG_MTD_PARTITIONS
226
227#ifdef UBIFS_SUPPORT
228#define CONFIG_RBTREE
229#define CONFIG_LZO
230#endif
231
232#define MTDIDS_DEFAULT "onenand0=onenand"
233#define MTDPARTS_DEFAULT "mtdparts=onenand:" \
234 __stringify(PART1_SIZE) PART1_SUFF "(" PART1_NAME ")ro," \
235 __stringify(PART2_SIZE) PART2_SUFF "(" PART2_NAME ")," \
236 __stringify(PART3_SIZE) PART3_SUFF "(" PART3_NAME ")," \
237 __stringify(PART4_SIZE) PART4_SUFF "(" PART4_NAME ")," \
238 __stringify(PART5_SIZE) PART5_SUFF "(" PART5_NAME ")," \
239 "-(" PART6_NAME ")"
240
241#endif
242
243/* Watchdog support */
244#define CONFIG_HW_WATCHDOG
245
246/*
247 * Framebuffer
248 */
249/* Video console */
250#define CONFIG_VIDEO
251#define CONFIG_CFB_CONSOLE
252#define CONFIG_CFB_CONSOLE_ANSI /* Enable ANSI escape codes in framebuffer */
253#define CONFIG_VIDEO_LOGO
254#define VIDEO_FB_16BPP_PIXEL_SWAP
255#define VIDEO_FB_16BPP_WORD_SWAP
256#define CONFIG_VIDEO_SW_CURSOR
257#define CONFIG_SPLASH_SCREEN
258
259/* functions for cfb_console */
260#define VIDEO_KBD_INIT_FCT rx51_kp_init()
261#define VIDEO_TSTC_FCT rx51_kp_tstc
262#define VIDEO_GETC_FCT rx51_kp_getc
263#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -0600264struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +0000265int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -0600266int rx51_kp_tstc(struct stdio_dev *sdev);
267int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +0000268#endif
269
270#ifndef MTDPARTS_DEFAULT
271#define MTDPARTS_DEFAULT
272#endif
273
274/* Environment information */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000275#define CONFIG_EXTRA_ENV_SETTINGS \
276 "mtdparts=" MTDPARTS_DEFAULT "\0" \
277 "usbtty=cdc_acm\0" \
278 "stdin=vga\0" \
279 "stdout=vga\0" \
280 "stderr=vga\0" \
281 "setcon=setenv stdin ${con};" \
282 "setenv stdout ${con};" \
283 "setenv stderr ${con}\0" \
284 "sercon=setenv con serial; run setcon\0" \
285 "usbcon=setenv con usbtty; run setcon\0" \
286 "vgacon=setenv con vga; run setcon\0" \
287 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
288 "switchmmc=mmc dev ${mmcnum}\0" \
289 "kernaddr=0x82008000\0" \
290 "initrdaddr=0x84008000\0" \
291 "scriptaddr=0x86008000\0" \
292 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
293 "${loadaddr} ${mmcfile}\0" \
294 "kernload=setenv loadaddr ${kernaddr};" \
295 "setenv mmcfile ${mmckernfile};" \
296 "run fileload\0" \
297 "initrdload=setenv loadaddr ${initrdaddr};" \
298 "setenv mmcfile ${mmcinitrdfile};" \
299 "run fileload\0" \
300 "scriptload=setenv loadaddr ${scriptaddr};" \
301 "setenv mmcfile ${mmcscriptfile};" \
302 "run fileload\0" \
303 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
304 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
305 "kernboot=echo Booting ${mmckernfile} from mmc " \
306 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
307 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
308 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
309 "attachboot=echo Booting attached kernel image ...;" \
310 "setenv setup_omap_atag 1;" \
311 "bootm ${attkernaddr};" \
312 "setenv setup_omap_atag\0" \
313 "trymmcscriptboot=if run switchmmc; then " \
314 "if run scriptload; then " \
315 "run scriptboot;" \
316 "fi;" \
317 "fi\0" \
318 "trymmckernboot=if run switchmmc; then " \
319 "if run kernload; then " \
320 "run kernboot;" \
321 "fi;" \
322 "fi\0" \
323 "trymmckerninitrdboot=if run switchmmc; then " \
324 "if run initrdload; then " \
325 "if run kernload; then " \
326 "run kerninitrdboot;" \
327 "fi;" \
328 "fi; " \
329 "fi\0" \
330 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
331 "setenv mmckernfile uImage; run trymmckernboot\0" \
332 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
333 "setenv mmcpart 2; run trymmcpartboot;" \
334 "setenv mmcpart 3; run trymmcpartboot;" \
335 "setenv mmcpart 4; run trymmcpartboot\0" \
336 "trymmcboot=if run switchmmc; then " \
337 "setenv mmctype fat;" \
338 "run trymmcallpartboot;" \
339 "setenv mmctype ext2;" \
340 "run trymmcallpartboot;" \
341 "setenv mmctype ext4;" \
342 "run trymmcallpartboot;" \
343 "fi\0" \
344 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
345 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000346 "menucmd=bootmenu\0" \
347 "bootmenu_0=Attached kernel=run attachboot\0" \
348 "bootmenu_1=Internal eMMC=run emmcboot\0" \
349 "bootmenu_2=External SD card=run sdboot\0" \
350 "bootmenu_3=U-Boot boot order=boot\0" \
351 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000352 ""
353
354#define CONFIG_PREBOOT \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000355 "setenv mmcnum 1; setenv mmcpart 1;" \
356 "setenv mmcscriptfile bootmenu.scr;" \
357 "if run switchmmc; then " \
358 "setenv mmcdone true;" \
359 "setenv mmctype fat;" \
360 "if run scriptload; then true; else " \
361 "setenv mmctype ext2;" \
362 "if run scriptload; then true; else " \
363 "setenv mmctype ext4;" \
364 "if run scriptload; then true; else " \
365 "setenv mmcdone false;" \
366 "fi;" \
367 "fi;" \
368 "fi;" \
369 "if ${mmcdone}; then " \
370 "run scriptboot;" \
371 "fi;" \
372 "fi;" \
373 "if run slide; then true; else " \
374 "setenv bootmenu_delay 0;" \
375 "setenv bootdelay 0;" \
376 "fi"
377
378#define CONFIG_POSTBOOTMENU \
379 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000380 "echo Extra commands:;" \
381 "echo run sercon - Use serial port for control.;" \
382 "echo run usbcon - Use usbtty for control.;" \
383 "echo run vgacon - Use framebuffer/keyboard.;" \
384 "echo run sdboot - Boot from SD card slot.;" \
385 "echo run emmcboot - Boot internal eMMC memory.;" \
386 "echo run attachboot - Boot attached kernel image.;" \
387 "echo"
388
389#define CONFIG_BOOTCOMMAND \
390 "run sdboot;" \
391 "run emmcboot;" \
392 "run attachboot;" \
393 "echo"
394
Pali Rohár13eb3e42013-03-07 05:15:19 +0000395#define CONFIG_BOOTDELAY 30
396#define CONFIG_AUTOBOOT_KEYED
397#define CONFIG_MENU
398#define CONFIG_MENU_SHOW
399
Pali Rohár248ef0a2012-10-29 07:54:01 +0000400/*
401 * Miscellaneous configurable options
402 */
403#define CONFIG_SYS_LONGHELP /* undef to save memory */
404#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
405#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
406#define CONFIG_SYS_PROMPT "Nokia RX-51 # "
407#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
408/* Print Buffer Size */
409#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
410 sizeof(CONFIG_SYS_PROMPT) + 16)
411#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
412/* Boot Argument Buffer Size */
413#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
414
415#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
416#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/
417
418/* default load address */
419#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
420
421/*
422 * OMAP3 has 12 GP timers, they can be driven by the system clock
423 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
424 * This rate is divided by a local divisor.
425 */
426#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
427#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000428
429/*
430 * Stack sizes
431 *
432 * The stack sizes are set up in start.S using the settings below
433 */
434#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
435
436/*
437 * Physical Memory Map
438 */
439#define CONFIG_NR_DRAM_BANKS 2
440#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
441
442/*
443 * FLASH and environment organization
444 */
445
446#define CONFIG_ENV_IS_NOWHERE
447
448#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
449#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
450#define CONFIG_SYS_INIT_RAM_SIZE 0x800
451#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
452 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
453
454/*
455 * Attached kernel image
456 */
457
458#define SDRAM_SIZE 0x10000000 /* 256 MB */
459#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
460
461#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
462#define KERNEL_OFFSET 0x40000 /* 256 kB */
463#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
464#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
465
466/* Reserve protected RAM for attached kernel */
467#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
468
469#endif /* __CONFIG_H */