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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: MediaTek USB3 xHCI
9
10maintainers:
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
12
13allOf:
14 - $ref: usb-xhci.yaml
15
16description: |
17 There are two scenarios:
18 case 1: only supports xHCI driver;
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
20
21properties:
22 # common properties for both case 1 and case 2
23 compatible:
24 items:
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
28 - mediatek,mt7622-xhci
29 - mediatek,mt7623-xhci
30 - mediatek,mt7629-xhci
31 - mediatek,mt7986-xhci
Tom Rini762f85b2024-07-20 11:15:10 -060032 - mediatek,mt7988-xhci
Tom Rini53633a82024-02-29 12:33:36 -050033 - mediatek,mt8173-xhci
34 - mediatek,mt8183-xhci
35 - mediatek,mt8186-xhci
36 - mediatek,mt8188-xhci
37 - mediatek,mt8192-xhci
38 - mediatek,mt8195-xhci
39 - mediatek,mt8365-xhci
40 - const: mediatek,mtk-xhci
41
42 reg:
43 minItems: 1
44 items:
45 - description: the registers of xHCI MAC
46 - description: the registers of IP Port Control
47
48 reg-names:
49 minItems: 1
50 items:
51 - const: mac
52 - const: ippc # optional, only needed for case 1.
53
54 interrupts:
55 description:
56 use "interrupts-extended" when the interrupts are connected to the
57 separate interrupt controllers
58 minItems: 1
59 items:
60 - description: xHCI host controller interrupt
61 - description: optional, wakeup interrupt used to support runtime PM
62
63 interrupt-names:
64 minItems: 1
65 items:
66 - const: host
67 - const: wakeup
68
69 power-domains:
70 description: A phandle to USB power domain node to control USB's MTCMOS
71 maxItems: 1
72
73 clocks:
74 minItems: 1
75 items:
76 - description: Controller clock used by normal mode
77 - description: Reference clock used by low power mode etc
78 - description: Mcu bus clock for register access
79 - description: DMA bus clock for data transfer
80 - description: controller clock
81 - description: frame count clock
82
83 clock-names:
84 minItems: 1
85 items:
86 - const: sys_ck # required, the following ones are optional
87 - const: ref_ck
88 - const: mcu_ck
89 - const: dma_ck
90 - const: xhci_ck
91 - const: frmcnt_ck
92
93 phys:
94 description:
95 List of all PHYs used on this HCD, it's better to keep PHYs in order
96 as the hardware layout
97 minItems: 1
98 items:
99 - description: USB2/HS PHY # required, others are optional
100 - description: USB3/SS(P) PHY
101 - description: USB2/HS PHY
102 - description: USB3/SS(P) PHY
103 - description: USB2/HS PHY
104 - description: USB3/SS(P) PHY
105 - description: USB2/HS PHY
106 - description: USB3/SS(P) PHY
107 - description: USB2/HS PHY
108
109 vusb33-supply:
110 description: Regulator of USB AVDD3.3v
111
112 vbus-supply:
113 description: Regulator of USB VBUS5v
114
115 resets:
116 maxItems: 1
117
118 usb3-lpm-capable: true
119
120 usb2-lpm-disable: true
121
122 imod-interval-ns:
123 description:
124 Interrupt moderation interval value, it is 8 times as much as that
125 defined in the xHCI spec on MTK's controller.
126 default: 5000
127
Tom Rini93743d22024-04-01 09:08:13 -0400128 rx-fifo-depth:
129 $ref: /schemas/types.yaml#/definitions/uint32
130 description:
131 It is a quirk used to work around Gen1 isoc-in endpoint transfer issue
132 that still send out unexpected ACK after device finishes the burst
133 transfer with a short packet and cause an exception, specially on a 4K
134 camera device, it happens on controller before about IPM v1.6.0;
135 the side-effect is that it may cause performance drop about 10%,
136 including bulk transfer, prefer to use 3k here. The size is in bytes.
137 enum: [1024, 2048, 3072, 4096]
138
Tom Rini53633a82024-02-29 12:33:36 -0500139 # the following properties are only used for case 1
140 wakeup-source:
141 description: enable USB remote wakeup, see power/wakeup-source.txt
142 type: boolean
143
144 mediatek,syscon-wakeup:
145 $ref: /schemas/types.yaml#/definitions/phandle-array
146 maxItems: 1
147 description:
148 A phandle to syscon used to access the register of the USB wakeup glue
149 layer between xHCI and SPM, the field should always be 3 cells long.
150 items:
151 items:
152 - description:
153 The first cell represents a phandle to syscon
154 - description:
155 The second cell represents the register base address of the glue
156 layer in syscon
157 - description: |
158 The third cell represents the hardware version of the glue layer,
159 1 - used by mt8173 etc, revision 1 without following IPM rule;
160 2 - used by mt2712 etc, revision 2 following IPM rule;
161 101 - used by mt8183, specific 1.01;
162 102 - used by mt8192, specific 1.02;
163 103 - used by mt8195, IP0, specific 1.03;
164 104 - used by mt8195, IP1, specific 1.04;
165 105 - used by mt8195, IP2, specific 1.05;
166 106 - used by mt8195, IP3, specific 1.06;
167 enum: [1, 2, 101, 102, 103, 104, 105, 106]
168
169 mediatek,u3p-dis-msk:
170 $ref: /schemas/types.yaml#/definitions/uint32
171 description: The mask to disable u3ports, bit0 for u3port0,
172 bit1 for u3port1, ... etc
173
174 mediatek,u2p-dis-msk:
175 $ref: /schemas/types.yaml#/definitions/uint32
176 description: The mask to disable u2ports, bit0 for u2port0,
177 bit1 for u2port1, ... etc
178
179 "#address-cells":
180 const: 1
181
182 "#size-cells":
183 const: 0
184
185patternProperties:
186 "@[0-9a-f]{1}$":
187 type: object
188 description: The hard wired USB devices.
189
190dependencies:
191 wakeup-source: [ 'mediatek,syscon-wakeup' ]
192
193required:
194 - compatible
195 - reg
196 - reg-names
197 - interrupts
198 - clocks
199 - clock-names
200
201additionalProperties: false
202
203examples:
204 - |
205 #include <dt-bindings/clock/mt8173-clk.h>
206 #include <dt-bindings/interrupt-controller/arm-gic.h>
207 #include <dt-bindings/interrupt-controller/irq.h>
208 #include <dt-bindings/phy/phy.h>
209 #include <dt-bindings/power/mt8173-power.h>
210
211 usb@11270000 {
212 compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
213 reg = <0x11270000 0x1000>, <0x11280700 0x0100>;
214 reg-names = "mac", "ippc";
215 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
216 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
217 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
218 clock-names = "sys_ck", "ref_ck";
219 phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>;
220 vusb33-supply = <&mt6397_vusb_reg>;
221 vbus-supply = <&usb_p1_vbus>;
222 imod-interval-ns = <10000>;
223 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
224 wakeup-source;
225 usb3-lpm-capable;
226 };
227...