blob: 4f79cdb417ab6397509901c4136b9e033815976d [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/loongson,ls2k-clk.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Loongson-2 SoC Clock Control Module
8
9maintainers:
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
11
12description: |
13 Loongson-2 SoC clock control module is an integrated clock controller, which
14 generates and supplies to all modules.
15
16properties:
17 compatible:
18 enum:
Tom Rini762f85b2024-07-20 11:15:10 -060019 - loongson,ls2k0500-clk
20 - loongson,ls2k-clk # This is for Loongson-2K1000
21 - loongson,ls2k2000-clk
Tom Rini53633a82024-02-29 12:33:36 -050022
23 reg:
24 maxItems: 1
25
26 clocks:
27 items:
28 - description: 100m ref
29
30 clock-names:
31 items:
32 - const: ref_100m
33
34 '#clock-cells':
35 const: 1
36 description:
37 The clock consumer should specify the desired clock by having the clock
38 ID in its "clocks" phandle cell. See include/dt-bindings/clock/loongson,ls2k-clk.h
39 for the full list of Loongson-2 SoC clock IDs.
40
41required:
42 - compatible
43 - reg
44 - clocks
45 - clock-names
46 - '#clock-cells'
47
48additionalProperties: false
49
50examples:
51 - |
52 ref_100m: clock-ref-100m {
53 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 clock-frequency = <100000000>;
56 clock-output-names = "ref_100m";
57 };
58
59 clk: clock-controller@1fe00480 {
60 compatible = "loongson,ls2k-clk";
61 reg = <0x1fe00480 0x58>;
62 #clock-cells = <1>;
63 clocks = <&ref_100m>;
64 clock-names = "ref_100m";
65 };