Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2013 Atmel Corporation |
| 4 | * Bo Shen <voice.shen@atmel.com> |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Simon Glass | f11478f | 2019-12-28 10:45:07 -0700 | [diff] [blame] | 8 | #include <hang.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 9 | #include <init.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 10 | #include <log.h> |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 11 | #include <asm/io.h> |
| 12 | #include <asm/arch/at91_common.h> |
| 13 | #include <asm/arch/at91_pit.h> |
| 14 | #include <asm/arch/at91_pmc.h> |
| 15 | #include <asm/arch/at91_rstc.h> |
| 16 | #include <asm/arch/at91_wdt.h> |
| 17 | #include <asm/arch/clk.h> |
| 18 | #include <spl.h> |
| 19 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 20 | static void switch_to_main_crystal_osc(void) |
| 21 | { |
| 22 | struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
| 23 | u32 tmp; |
| 24 | |
| 25 | tmp = readl(&pmc->mor); |
| 26 | tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff); |
| 27 | tmp &= ~AT91_PMC_MOR_KEY(0xff); |
| 28 | tmp |= AT91_PMC_MOR_MOSCEN; |
| 29 | tmp |= AT91_PMC_MOR_OSCOUNT(8); |
| 30 | tmp |= AT91_PMC_MOR_KEY(0x37); |
| 31 | writel(tmp, &pmc->mor); |
| 32 | while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS)) |
| 33 | ; |
| 34 | |
Wenyou Yang | f5fb545 | 2017-09-13 14:58:48 +0800 | [diff] [blame] | 35 | #if defined(CONFIG_SAMA5D2) |
| 36 | /* Enable a measurement of the external oscillator */ |
| 37 | tmp = readl(&pmc->mcfr); |
| 38 | tmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC; |
| 39 | tmp |= AT91_PMC_MCFR_RCMEAS; |
| 40 | writel(tmp, &pmc->mcfr); |
| 41 | |
| 42 | while (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY)) |
| 43 | ; |
| 44 | |
| 45 | if (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK)) |
| 46 | hang(); |
| 47 | #endif |
| 48 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 49 | tmp = readl(&pmc->mor); |
Eugen Hristev | fdd833e | 2019-05-24 09:38:10 +0300 | [diff] [blame] | 50 | /* |
| 51 | * some boards have an external oscillator with driving. |
| 52 | * in this case we need to disable the internal SoC driving (bypass mode) |
| 53 | */ |
| 54 | #if defined(CONFIG_SPL_AT91_MCK_BYPASS) |
| 55 | tmp |= AT91_PMC_MOR_OSCBYPASS; |
| 56 | #else |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 57 | tmp &= ~AT91_PMC_MOR_OSCBYPASS; |
Eugen Hristev | fdd833e | 2019-05-24 09:38:10 +0300 | [diff] [blame] | 58 | #endif |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 59 | tmp &= ~AT91_PMC_MOR_KEY(0xff); |
| 60 | tmp |= AT91_PMC_MOR_KEY(0x37); |
| 61 | writel(tmp, &pmc->mor); |
| 62 | |
| 63 | tmp = readl(&pmc->mor); |
| 64 | tmp |= AT91_PMC_MOR_MOSCSEL; |
| 65 | tmp &= ~AT91_PMC_MOR_KEY(0xff); |
| 66 | tmp |= AT91_PMC_MOR_KEY(0x37); |
| 67 | writel(tmp, &pmc->mor); |
| 68 | |
| 69 | while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS)) |
| 70 | ; |
| 71 | |
Wenyou Yang | f5fb545 | 2017-09-13 14:58:48 +0800 | [diff] [blame] | 72 | #if !defined(CONFIG_SAMA5D2) |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 73 | /* Wait until MAINRDY field is set to make sure main clock is stable */ |
| 74 | while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY)) |
| 75 | ; |
Wenyou Yang | f5fb545 | 2017-09-13 14:58:48 +0800 | [diff] [blame] | 76 | #endif |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 77 | |
Wenyou Yang | f5fb545 | 2017-09-13 14:58:48 +0800 | [diff] [blame] | 78 | #if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2) |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 79 | tmp = readl(&pmc->mor); |
| 80 | tmp &= ~AT91_PMC_MOR_MOSCRCEN; |
| 81 | tmp &= ~AT91_PMC_MOR_KEY(0xff); |
| 82 | tmp |= AT91_PMC_MOR_KEY(0x37); |
| 83 | writel(tmp, &pmc->mor); |
Bo Shen | 73864b1 | 2014-12-15 13:24:32 +0800 | [diff] [blame] | 84 | #endif |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 85 | } |
| 86 | |
Bo Shen | 7dc2dbd | 2014-12-15 13:24:30 +0800 | [diff] [blame] | 87 | __weak void matrix_init(void) |
| 88 | { |
| 89 | /* This only be used for sama5d4 soc now */ |
| 90 | } |
| 91 | |
Bo Shen | 0a91028 | 2014-12-15 13:24:31 +0800 | [diff] [blame] | 92 | __weak void redirect_int_from_saic_to_aic(void) |
| 93 | { |
| 94 | /* This only be used for sama5d4 soc now */ |
| 95 | } |
| 96 | |
Tom Rini | d9eae55 | 2015-02-10 19:07:22 -0500 | [diff] [blame] | 97 | /* empty stub to satisfy current lowlevel_init, can be removed any time */ |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 98 | void s_init(void) |
| 99 | { |
Tom Rini | d9eae55 | 2015-02-10 19:07:22 -0500 | [diff] [blame] | 100 | } |
| 101 | |
| 102 | void board_init_f(ulong dummy) |
| 103 | { |
Wenyou Yang | f13d0ff | 2017-03-24 11:34:04 +0800 | [diff] [blame] | 104 | int ret; |
| 105 | |
Greg Gallagher | 6a9390f | 2021-01-21 11:55:36 -0500 | [diff] [blame] | 106 | if (IS_ENABLED(CONFIG_OF_CONTROL)) { |
| 107 | ret = spl_early_init(); |
| 108 | if (ret) { |
| 109 | debug("spl_early_init() failed: %d\n", ret); |
| 110 | hang(); |
| 111 | } |
| 112 | } |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 113 | switch_to_main_crystal_osc(); |
| 114 | |
Samuel Mescoff | c3156fc | 2016-02-16 09:45:06 +0100 | [diff] [blame] | 115 | #ifdef CONFIG_SAMA5D2 |
| 116 | configure_2nd_sram_as_l2_cache(); |
| 117 | #endif |
| 118 | |
Prasanthi Chellakumar | 0509c4e | 2018-10-09 11:46:40 -0700 | [diff] [blame] | 119 | #if !defined(CONFIG_WDT_AT91) |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 120 | /* disable watchdog */ |
| 121 | at91_disable_wdt(); |
Tom Rini | 4a2b61b | 2018-05-10 07:15:52 -0400 | [diff] [blame] | 122 | #endif |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 123 | |
| 124 | /* PMC configuration */ |
| 125 | at91_pmc_init(); |
| 126 | |
| 127 | at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); |
| 128 | |
Bo Shen | 7dc2dbd | 2014-12-15 13:24:30 +0800 | [diff] [blame] | 129 | matrix_init(); |
| 130 | |
Bo Shen | 0a91028 | 2014-12-15 13:24:31 +0800 | [diff] [blame] | 131 | redirect_int_from_saic_to_aic(); |
| 132 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 133 | timer_init(); |
| 134 | |
| 135 | board_early_init_f(); |
| 136 | |
Wenyou Yang | ac8af4c | 2017-03-24 11:34:05 +0800 | [diff] [blame] | 137 | mem_init(); |
| 138 | |
Wenyou Yang | f13d0ff | 2017-03-24 11:34:04 +0800 | [diff] [blame] | 139 | ret = spl_init(); |
| 140 | if (ret) { |
| 141 | debug("spl_init() failed: %d\n", ret); |
| 142 | hang(); |
| 143 | } |
| 144 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 145 | preloader_console_init(); |
| 146 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 147 | } |