blob: 54d0e1e0e3b22721795ae77d6403a415dfca2bae [file] [log] [blame]
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09001/*
2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09007 */
8
9#include <common.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000010#include <spi.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000011#include <lcd.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090012#include <asm/io.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000013#include <asm/gpio.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090014#include <asm/arch/adc.h>
15#include <asm/arch/gpio.h>
16#include <asm/arch/mmc.h>
Piotr Wilczek3b179142012-09-20 00:19:59 +000017#include <asm/arch/pinmux.h>
Piotr Wilczek6ce94c32012-09-20 00:20:00 +000018#include <asm/arch/watchdog.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000019#include <libtizen.h>
20#include <ld9040.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000021#include <power/pmic.h>
Lukasz Majewskibf731262011-12-15 10:32:12 +010022#include <usb/s3c_udc.h>
23#include <asm/arch/cpu.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000024#include <power/max8998_pmic.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090025
26DECLARE_GLOBAL_DATA_PTR;
27
Chander Kashyap4131a772011-12-06 23:34:12 +000028struct exynos4_gpio_part1 *gpio1;
29struct exynos4_gpio_part2 *gpio2;
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090030unsigned int board_rev;
31
32u32 get_board_rev(void)
33{
34 return board_rev;
35}
36
37static int get_hwrev(void)
38{
39 return board_rev & 0xFF;
40}
41
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +000042static void init_pmic_lcd(void);
43
Łukasz Majewski11be2832012-11-13 03:22:17 +000044int power_init_board(void)
45{
46 int ret;
47
Łukasz Majewskide55e752013-08-16 15:33:33 +020048 /*
49 * For PMIC the I2C bus is named as I2C5, but it is connected
50 * to logical I2C adapter 0
51 */
Łukasz Majewski11be2832012-11-13 03:22:17 +000052 ret = pmic_init(I2C_5);
53 if (ret)
54 return ret;
55
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +000056 init_pmic_lcd();
57
Łukasz Majewski11be2832012-11-13 03:22:17 +000058 return 0;
59}
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090060
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090061int dram_init(void)
62{
63 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
64 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
65
66 return 0;
67}
68
69void dram_init_banksize(void)
70{
71 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
72 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
73 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
74 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
75}
76
77static unsigned short get_adc_value(int channel)
78{
79 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
80 unsigned short ret = 0;
81 unsigned int reg;
82 unsigned int loop = 0;
83
84 writel(channel & 0xF, &adc->adcmux);
85 writel((1 << 14) | (49 << 6), &adc->adccon);
86 writel(1000 & 0xffff, &adc->adcdly);
87 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
88 udelay(10);
89 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
90 udelay(10);
91
92 do {
93 udelay(1);
94 reg = readl(&adc->adccon);
95 } while (!(reg & (1 << 15)) && (loop++ < 1000));
96
97 ret = readl(&adc->adcdat0) & 0xFFF;
98
99 return ret;
100}
101
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000102static int adc_power_control(int on)
103{
104 int ret;
Łukasz Majewski1c6dba12012-11-13 03:21:55 +0000105 struct pmic *p = pmic_get("MAX8998_PMIC");
106 if (!p)
107 return -ENODEV;
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000108
109 if (pmic_probe(p))
110 return -1;
111
112 ret = pmic_set_output(p,
113 MAX8998_REG_ONOFF1,
114 MAX8998_LDO4, !!on);
115
116 return ret;
117}
118
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900119static unsigned int get_hw_revision(void)
120{
121 int hwrev, mode0, mode1;
122
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000123 adc_power_control(1);
124
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900125 mode0 = get_adc_value(1); /* HWREV_MODE0 */
126 mode1 = get_adc_value(2); /* HWREV_MODE1 */
127
128 /*
129 * XXX Always set the default hwrev as the latest board
130 * ADC = (voltage) / 3.3 * 4096
131 */
132 hwrev = 3;
133
134#define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
135 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
136 hwrev = 0x0; /* 0.01V 0.01V */
137 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
138 hwrev = 0x1; /* 610mV 0.01V */
139 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
140 hwrev = 0x2; /* 1.16V 0.01V */
141 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
142 hwrev = 0x3; /* 1.79V 0.01V */
143#undef IS_RANGE
144
145 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
146
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000147 adc_power_control(0);
148
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900149 return hwrev;
150}
151
152static void check_hw_revision(void)
153{
154 int hwrev;
155
156 hwrev = get_hw_revision();
157
158 board_rev |= hwrev;
159}
160
161#ifdef CONFIG_DISPLAY_BOARDINFO
162int checkboard(void)
163{
164 puts("Board:\tUniversal C210\n");
165 return 0;
166}
167#endif
168
169#ifdef CONFIG_GENERIC_MMC
170int board_mmc_init(bd_t *bis)
171{
Piotr Wilczek3b179142012-09-20 00:19:59 +0000172 int err;
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900173
174 switch (get_hwrev()) {
175 case 0:
176 /*
177 * Set the low to enable LDO_EN
178 * But when you use the test board for eMMC booting
179 * you should set it HIGH since it removes the inverter
180 */
181 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000182 s5p_gpio_direction_output(&gpio1->e3, 6, 0);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900183 break;
184 default:
185 /*
186 * Default reset state is High and there's no inverter
187 * But set it as HIGH to ensure
188 */
189 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000190 s5p_gpio_direction_output(&gpio1->e1, 3, 1);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900191 break;
192 }
193
194 /*
Piotr Wilczek3b179142012-09-20 00:19:59 +0000195 * MMC device init
196 * mmc0 : eMMC (8-bit buswidth)
197 * mmc2 : SD card (4-bit buswidth)
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900198 */
Piotr Wilczek3b179142012-09-20 00:19:59 +0000199 err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
200 if (err)
201 debug("SDMMC0 not configured\n");
202 else
203 err = s5p_mmc_init(0, 8);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900204
205 /* T-flash detect */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000206 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
207 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900208
209 /*
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900210 * Check the T-flash detect pin
211 * GPX3[4] T-flash detect pin
212 */
Łukasz Majewski4ff84e22011-08-09 23:18:54 +0000213 if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
Piotr Wilczek3b179142012-09-20 00:19:59 +0000214 err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
215 if (err)
216 debug("SDMMC2 not configured\n");
217 else
218 err = s5p_mmc_init(2, 4);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900219 }
220
221 return err;
222
223}
224#endif
Lukasz Majewskibf731262011-12-15 10:32:12 +0100225
226#ifdef CONFIG_USB_GADGET
227static int s5pc210_phy_control(int on)
228{
Anatolij Gustschinba166612011-12-19 04:20:04 +0000229 int ret = 0;
Łukasz Majewski1c6dba12012-11-13 03:21:55 +0000230 struct pmic *p = pmic_get("MAX8998_PMIC");
231 if (!p)
232 return -ENODEV;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100233
234 if (pmic_probe(p))
235 return -1;
236
237 if (on) {
238 ret |= pmic_set_output(p,
239 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
240 MAX8998_SAFEOUT1, LDO_ON);
241 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
242 MAX8998_LDO3, LDO_ON);
243 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
244 MAX8998_LDO8, LDO_ON);
245
246 } else {
247 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
248 MAX8998_LDO8, LDO_OFF);
249 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
250 MAX8998_LDO3, LDO_OFF);
251 ret |= pmic_set_output(p,
252 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
253 MAX8998_SAFEOUT1, LDO_OFF);
254 }
255
256 if (ret) {
257 puts("MAX8998 LDO setting error!\n");
258 return -1;
259 }
260
261 return 0;
262}
263
264struct s3c_plat_otg_data s5pc210_otg_data = {
265 .phy_control = s5pc210_phy_control,
266 .regs_phy = EXYNOS4_USBPHY_BASE,
267 .regs_otg = EXYNOS4_USBOTG_BASE,
268 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
269 .usb_flags = PHY0_SLEEP,
270};
271#endif
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000272
273int board_early_init_f(void)
274{
275 wdt_stop();
276
277 return 0;
278}
Piotr Wilczeke372b552012-10-19 05:34:03 +0000279
280#ifdef CONFIG_SOFT_SPI
281static void soft_spi_init(void)
282{
283 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
284 CONFIG_SOFT_SPI_MODE & SPI_CPOL);
285 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
286 gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
287 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
288 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
289}
290
291void spi_cs_activate(struct spi_slave *slave)
292{
293 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
294 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
295 SPI_SCL(1);
296 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
297 CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
298}
299
300void spi_cs_deactivate(struct spi_slave *slave)
301{
302 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
303 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
304}
305
306int spi_cs_is_valid(unsigned int bus, unsigned int cs)
307{
308 return bus == 0 && cs == 0;
309}
310
311void universal_spi_scl(int bit)
312{
313 gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
314}
315
316void universal_spi_sda(int bit)
317{
318 gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
319}
320
321int universal_spi_read(void)
322{
323 return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
324}
325#endif
326
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000327static void init_pmic_lcd(void)
328{
329 unsigned char val;
330 int ret = 0;
331
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +0000332 struct pmic *p = pmic_get("MAX8998_PMIC");
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000333
Minkyu Kang538f26b2012-12-10 22:43:57 +0900334 if (!p)
335 return;
336
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000337 if (pmic_probe(p))
338 return;
339
340 /* LDO7 1.8V */
341 val = 0x02; /* (1800 - 1600) / 100; */
342 ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val);
343
344 /* LDO17 3.0V */
345 val = 0xe; /* (3000 - 1600) / 100; */
346 ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val);
347
348 /* Disable unneeded regulators */
349 /*
350 * ONOFF1
351 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
352 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
353 */
354 val = 0xB9;
355 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
356
357 /* ONOFF2
358 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
359 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
360 */
361 val = 0x50;
362 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
363
364 /* ONOFF3
365 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
366 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
367 */
368 val = 0x00;
369 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
370
371 if (ret)
372 puts("LCD pmic initialisation error!\n");
373}
374
Ajay Kumar41022a12013-02-21 23:52:57 +0000375void exynos_cfg_lcd_gpio(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000376{
377 unsigned int i, f3_end = 4;
378
379 for (i = 0; i < 8; i++) {
380 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
381 s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
382 s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
383 s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
384 /* pull-up/down disable */
385 s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
386 s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
387 s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
388
389 /* drive strength to max (24bit) */
390 s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
391 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
392 s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
393 s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
394 s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
395 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
396 }
397
398 for (i = 0; i < f3_end; i++) {
399 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
400 s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
401 /* pull-up/down disable */
402 s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
403 /* drive strength to max (24bit) */
404 s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
405 s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
406 }
407
408 /* gpio pad configuration for LCD reset. */
409 s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
410
411 spi_init();
412}
413
Ajay Kumar41022a12013-02-21 23:52:57 +0000414void exynos_reset_lcd(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000415{
416 s5p_gpio_set_value(&gpio2->y4, 5, 1);
417 udelay(10000);
418 s5p_gpio_set_value(&gpio2->y4, 5, 0);
419 udelay(10000);
420 s5p_gpio_set_value(&gpio2->y4, 5, 1);
421 udelay(100);
422}
423
Ajay Kumar41022a12013-02-21 23:52:57 +0000424void exynos_lcd_power_on(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000425{
Minkyu Kang1d4f9ca2012-12-09 20:50:11 +0000426 struct pmic *p = pmic_get("MAX8998_PMIC");
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000427
Minkyu Kang538f26b2012-12-10 22:43:57 +0900428 if (!p)
429 return;
430
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000431 if (pmic_probe(p))
432 return;
433
434 pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
435 pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
436}
437
438vidinfo_t panel_info = {
439 .vl_freq = 60,
440 .vl_col = 480,
441 .vl_row = 800,
442 .vl_width = 480,
443 .vl_height = 800,
444 .vl_clkp = CONFIG_SYS_HIGH,
445 .vl_hsp = CONFIG_SYS_HIGH,
446 .vl_vsp = CONFIG_SYS_HIGH,
447 .vl_dp = CONFIG_SYS_HIGH,
448
449 .vl_bpix = 5, /* Bits per pixel */
450
451 /* LD9040 LCD Panel */
452 .vl_hspw = 2,
453 .vl_hbpd = 16,
454 .vl_hfpd = 16,
455
456 .vl_vspw = 2,
457 .vl_vbpd = 8,
458 .vl_vfpd = 8,
459 .vl_cmd_allow_len = 0xf,
460
461 .win_id = 0,
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000462 .dual_lcd_enabled = 0,
463
464 .init_delay = 0,
465 .power_on_delay = 10000,
466 .reset_delay = 10000,
467 .interface_mode = FIMD_RGB_INTERFACE,
468 .mipi_enabled = 0,
469};
470
Ajay Kumar41022a12013-02-21 23:52:57 +0000471void exynos_cfg_ldo(void)
472{
473 ld9040_cfg_ldo();
474}
475
476void exynos_enable_ldo(unsigned int onoff)
477{
478 ld9040_enable_ldo(onoff);
479}
480
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000481void init_panel_info(vidinfo_t *vid)
482{
483 vid->logo_on = 1;
484 vid->resolution = HD_RESOLUTION;
485 vid->rgb_mode = MODE_RGB_P;
486
487#ifdef CONFIG_TIZEN
488 get_tizen_logo_info(vid);
489#endif
490
491 /* for LD9040. */
492 vid->pclk_name = 1; /* MPLL */
493 vid->sclk_div = 1;
494
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000495 setenv("lcdinfo", "lcd=ld9040");
496}
497
Piotr Wilczeke372b552012-10-19 05:34:03 +0000498int board_init(void)
499{
500 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
501 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
502
503 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
504 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
505
Piotr Wilczeke372b552012-10-19 05:34:03 +0000506#ifdef CONFIG_SOFT_SPI
507 soft_spi_init();
508#endif
509 check_hw_revision();
510 printf("HW Revision:\t0x%x\n", board_rev);
511
512 return 0;
513}