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git01.mediatek.com / filogic / uboot / 0601c1be9f87c059999821e61d6ff9fb14ef554d / . / test / dm / clk.c
blob: b06906a3ecfa42ac84383f56ecb1baf9e0ab9562 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]2/*
3 * Copyright (C) 2015 Google, Inc
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]4 */
5
6#include <common.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]7#include <dm.h>
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]8#include <asm/clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]9#include <dm/test.h>
10#include <linux/err.h>
11#include <test/ut.h>
12
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]13static int dm_test_clk(struct unit_test_state *uts)
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]14{
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]15 struct udevice *dev_fixed, *dev_clk, *dev_test;
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]16 ulong rate;
17
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]18 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed",
19 &dev_fixed));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]20
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]21 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
22 &dev_clk));
23 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
24 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
25 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
26 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]27
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]28 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
29 &dev_test));
30 ut_assertok(sandbox_clk_test_get(dev_test));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]31
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]32 ut_asserteq(1234,
33 sandbox_clk_test_get_rate(dev_test,
34 SANDBOX_CLK_TEST_ID_FIXED));
35 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
36 SANDBOX_CLK_TEST_ID_SPI));
37 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
38 SANDBOX_CLK_TEST_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]39
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]40 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED,
41 12345);
42 ut_assert(IS_ERR_VALUE(rate));
43 rate = sandbox_clk_test_get_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED);
44 ut_asserteq(1234, rate);
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]45
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]46 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
47 SANDBOX_CLK_TEST_ID_SPI,
48 1000));
49 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
50 SANDBOX_CLK_TEST_ID_I2C,
51 2000));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]52
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]53 ut_asserteq(1000, sandbox_clk_test_get_rate(dev_test,
54 SANDBOX_CLK_TEST_ID_SPI));
55 ut_asserteq(2000, sandbox_clk_test_get_rate(dev_test,
56 SANDBOX_CLK_TEST_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]57
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]58 ut_asserteq(1000, sandbox_clk_test_set_rate(dev_test,
59 SANDBOX_CLK_TEST_ID_SPI,
60 10000));
61 ut_asserteq(2000, sandbox_clk_test_set_rate(dev_test,
62 SANDBOX_CLK_TEST_ID_I2C,
63 20000));
64
65 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0);
66 ut_assert(IS_ERR_VALUE(rate));
67 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0);
68 ut_assert(IS_ERR_VALUE(rate));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]69
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]70 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
71 SANDBOX_CLK_TEST_ID_SPI));
72 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
73 SANDBOX_CLK_TEST_ID_I2C));
74
75 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
76 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
77 ut_asserteq(10000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
78 ut_asserteq(20000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
79
80 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_SPI));
81 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
82 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
83
84 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_I2C));
85 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
86 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
87
88 ut_assertok(sandbox_clk_test_disable(dev_test,
89 SANDBOX_CLK_TEST_ID_SPI));
90 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
91 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
92
93 ut_assertok(sandbox_clk_test_disable(dev_test,
94 SANDBOX_CLK_TEST_ID_I2C));
95 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
96 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
97
98 ut_assertok(sandbox_clk_test_free(dev_test));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]99
100 return 0;
101}
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]102DM_TEST(dm_test_clk, DM_TESTF_SCAN_FDT);
Neil Armstrong567a38b2018-04-03 11:44:19 +0200[diff] [blame]103
104static int dm_test_clk_bulk(struct unit_test_state *uts)
105{
106 struct udevice *dev_clk, *dev_test;
107
108 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
109 &dev_clk));
110 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
111 &dev_test));
112 ut_assertok(sandbox_clk_test_get_bulk(dev_test));
113
114 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
115 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
116
117 /* Fixed clock does not support enable, thus should not fail */
118 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
119 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
120 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
121
122 /* Fixed clock does not support disable, thus should not fail */
123 ut_assertok(sandbox_clk_test_disable_bulk(dev_test));
124 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
125 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
126
127 /* Fixed clock does not support enable, thus should not fail */
128 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
129 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
130 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
131
132 /* Fixed clock does not support disable, thus should not fail */
133 ut_assertok(sandbox_clk_test_release_bulk(dev_test));
134 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
135 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
136
137 return 0;
138}
139DM_TEST(dm_test_clk_bulk, DM_TESTF_SCAN_FDT);