Beniamino Galvani | 2176d73 | 2016-08-16 11:49:49 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #ifndef __PINCTRL_MESON_H__ |
| 8 | #define __PINCTRL_MESON_H__ |
| 9 | |
| 10 | #include <linux/types.h> |
| 11 | |
| 12 | struct meson_pmx_group { |
| 13 | const char *name; |
| 14 | const unsigned int *pins; |
| 15 | unsigned int num_pins; |
| 16 | bool is_gpio; |
| 17 | unsigned int reg; |
| 18 | unsigned int bit; |
| 19 | }; |
| 20 | |
| 21 | struct meson_pmx_func { |
| 22 | const char *name; |
| 23 | const char * const *groups; |
| 24 | unsigned int num_groups; |
| 25 | }; |
| 26 | |
| 27 | struct meson_pinctrl_data { |
| 28 | const char *name; |
| 29 | struct meson_pmx_group *groups; |
| 30 | struct meson_pmx_func *funcs; |
Beniamino Galvani | 5aeb135 | 2017-07-10 00:30:04 +0200 | [diff] [blame] | 31 | struct meson_bank *banks; |
Beniamino Galvani | 2176d73 | 2016-08-16 11:49:49 +0200 | [diff] [blame] | 32 | unsigned int pin_base; |
| 33 | unsigned int num_pins; |
| 34 | unsigned int num_groups; |
| 35 | unsigned int num_funcs; |
Beniamino Galvani | 5aeb135 | 2017-07-10 00:30:04 +0200 | [diff] [blame] | 36 | unsigned int num_banks; |
Beniamino Galvani | 2176d73 | 2016-08-16 11:49:49 +0200 | [diff] [blame] | 37 | }; |
| 38 | |
| 39 | struct meson_pinctrl { |
| 40 | struct meson_pinctrl_data *data; |
| 41 | void __iomem *reg_mux; |
Beniamino Galvani | 5aeb135 | 2017-07-10 00:30:04 +0200 | [diff] [blame] | 42 | void __iomem *reg_gpio; |
Beniamino Galvani | 2176d73 | 2016-08-16 11:49:49 +0200 | [diff] [blame] | 43 | }; |
| 44 | |
Beniamino Galvani | 5aeb135 | 2017-07-10 00:30:04 +0200 | [diff] [blame] | 45 | /** |
| 46 | * struct meson_reg_desc - a register descriptor |
| 47 | * |
| 48 | * @reg: register offset in the regmap |
| 49 | * @bit: bit index in register |
| 50 | * |
| 51 | * The structure describes the information needed to control pull, |
| 52 | * pull-enable, direction, etc. for a single pin |
| 53 | */ |
| 54 | struct meson_reg_desc { |
| 55 | unsigned int reg; |
| 56 | unsigned int bit; |
| 57 | }; |
| 58 | |
| 59 | /** |
| 60 | * enum meson_reg_type - type of registers encoded in @meson_reg_desc |
| 61 | */ |
| 62 | enum meson_reg_type { |
| 63 | REG_PULLEN, |
| 64 | REG_PULL, |
| 65 | REG_DIR, |
| 66 | REG_OUT, |
| 67 | REG_IN, |
| 68 | NUM_REG, |
| 69 | }; |
| 70 | |
| 71 | /** |
| 72 | * struct meson bank |
| 73 | * |
| 74 | * @name: bank name |
| 75 | * @first: first pin of the bank |
| 76 | * @last: last pin of the bank |
| 77 | * @regs: array of register descriptors |
| 78 | * |
| 79 | * A bank represents a set of pins controlled by a contiguous set of |
| 80 | * bits in the domain registers. The structure specifies which bits in |
| 81 | * the regmap control the different functionalities. Each member of |
| 82 | * the @regs array refers to the first pin of the bank. |
| 83 | */ |
| 84 | struct meson_bank { |
| 85 | const char *name; |
| 86 | unsigned int first; |
| 87 | unsigned int last; |
| 88 | struct meson_reg_desc regs[NUM_REG]; |
| 89 | }; |
| 90 | |
Beniamino Galvani | 2176d73 | 2016-08-16 11:49:49 +0200 | [diff] [blame] | 91 | #define PIN(x, b) (b + x) |
| 92 | |
| 93 | #define GROUP(grp, r, b) \ |
| 94 | { \ |
| 95 | .name = #grp, \ |
| 96 | .pins = grp ## _pins, \ |
| 97 | .num_pins = ARRAY_SIZE(grp ## _pins), \ |
| 98 | .reg = r, \ |
| 99 | .bit = b, \ |
| 100 | } |
| 101 | |
| 102 | #define GPIO_GROUP(gpio, b) \ |
| 103 | { \ |
| 104 | .name = #gpio, \ |
| 105 | .pins = (const unsigned int[]){ PIN(gpio, b) }, \ |
| 106 | .num_pins = 1, \ |
| 107 | .is_gpio = true, \ |
| 108 | } |
| 109 | |
| 110 | #define FUNCTION(fn) \ |
| 111 | { \ |
| 112 | .name = #fn, \ |
| 113 | .groups = fn ## _groups, \ |
| 114 | .num_groups = ARRAY_SIZE(fn ## _groups), \ |
| 115 | } |
| 116 | |
Beniamino Galvani | 5aeb135 | 2017-07-10 00:30:04 +0200 | [diff] [blame] | 117 | #define BANK(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ |
| 118 | { \ |
| 119 | .name = n, \ |
| 120 | .first = f, \ |
| 121 | .last = l, \ |
| 122 | .regs = { \ |
| 123 | [REG_PULLEN] = { per, peb }, \ |
| 124 | [REG_PULL] = { pr, pb }, \ |
| 125 | [REG_DIR] = { dr, db }, \ |
| 126 | [REG_OUT] = { or, ob }, \ |
| 127 | [REG_IN] = { ir, ib }, \ |
| 128 | }, \ |
| 129 | } |
| 130 | |
Beniamino Galvani | 2176d73 | 2016-08-16 11:49:49 +0200 | [diff] [blame] | 131 | #define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x) |
| 132 | |
| 133 | extern const struct pinctrl_ops meson_pinctrl_ops; |
| 134 | |
| 135 | int meson_pinctrl_probe(struct udevice *dev); |
| 136 | |
| 137 | #endif /* __PINCTRL_MESON_H__ */ |