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Matthias Weisser82001ef2011-07-06 00:28:33 +00001/*
2 * (c) 2011 Graf-Syteco, Matthias Weisser
3 * <weisserm@arcor.de>
4 *
5 * Based on tx25.c:
6 * (C) Copyright 2009 DENX Software Engineering
7 * Author: John Rigby <jrigby@gmail.com>
8 *
9 * Based on imx27lite.c:
10 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
11 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
12 * And:
13 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
14 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020015 * SPDX-License-Identifier: GPL-2.0+
Matthias Weisser82001ef2011-07-06 00:28:33 +000016 */
17#include <common.h>
Stefano Babicfde362f2011-08-21 10:55:05 +020018#include <asm/gpio.h>
Matthias Weisser82001ef2011-07-06 00:28:33 +000019#include <asm/io.h>
20#include <asm/arch/imx-regs.h>
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000021#include <asm/arch/iomux-mx25.h>
Matthias Weisser82001ef2011-07-06 00:28:33 +000022
23DECLARE_GLOBAL_DATA_PTR;
24
25int board_init()
26{
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000027 static const iomux_v3_cfg_t sdhc1_pads[] = {
28 NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
29 NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL),
30 NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL),
31 NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL),
32 NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL),
33 NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL),
34 };
Matthias Weisser82001ef2011-07-06 00:28:33 +000035
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000036 static const iomux_v3_cfg_t dig_out_pads[] = {
37 MX25_PAD_CSI_D8__GPIO_1_7, /* Ouput 1 Ctrl */
38 MX25_PAD_CSI_D7__GPIO_1_6, /* Ouput 2 Ctrl */
39 NEW_PAD_CTRL(MX25_PAD_CSI_D6__GPIO_1_31, 0), /* Ouput 1 Stat */
40 NEW_PAD_CTRL(MX25_PAD_CSI_D5__GPIO_1_30, 0), /* Ouput 2 Stat */
41 };
42
43 static const iomux_v3_cfg_t led_pads[] = {
44 MX25_PAD_CSI_D9__GPIO_4_21,
45 MX25_PAD_CSI_D4__GPIO_1_29,
46 };
47
48 static const iomux_v3_cfg_t can_pads[] = {
49 NEW_PAD_CTRL(MX25_PAD_GPIO_A__CAN1_TX, NO_PAD_CTRL),
50 NEW_PAD_CTRL(MX25_PAD_GPIO_B__CAN1_RX, NO_PAD_CTRL),
51 NEW_PAD_CTRL(MX25_PAD_GPIO_C__CAN2_TX, NO_PAD_CTRL),
52 NEW_PAD_CTRL(MX25_PAD_GPIO_D__CAN2_RX, NO_PAD_CTRL),
53 };
54
55 static const iomux_v3_cfg_t i2c3_pads[] = {
56 MX25_PAD_CSPI1_SS1__I2C3_DAT,
57 MX25_PAD_GPIO_E__I2C3_CLK,
58 };
Matthias Weisser82001ef2011-07-06 00:28:33 +000059
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000060 icache_enable();
Matthias Weisser82001ef2011-07-06 00:28:33 +000061
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000062 /* Setup of core voltage selection pin to run at 1.4V */
63 imx_iomux_v3_setup_pad(MX25_PAD_EXT_ARMCLK__GPIO_3_15); /* VCORE */
Stefano Babicfc05b902012-08-19 21:33:50 +000064 gpio_direction_output(IMX_GPIO_NR(3, 15), 1);
Matthias Weisser82001ef2011-07-06 00:28:33 +000065
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000066 /* Setup of SD card pins*/
67 imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +000068
69 /* Setup of digital output for USB power and OC */
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000070 imx_iomux_v3_setup_pad(MX25_PAD_CSI_D3__GPIO_1_28); /* USB Power */
Stefano Babicfc05b902012-08-19 21:33:50 +000071 gpio_direction_output(IMX_GPIO_NR(1, 28), 1);
Matthias Weisser82001ef2011-07-06 00:28:33 +000072
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000073 imx_iomux_v3_setup_pad(MX25_PAD_CSI_D2__GPIO_1_27); /* USB OC */
Stefano Babicfc05b902012-08-19 21:33:50 +000074 gpio_direction_input(IMX_GPIO_NR(1, 18));
Matthias Weisser82001ef2011-07-06 00:28:33 +000075
76 /* Setup of digital output control pins */
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000077 imx_iomux_v3_setup_multiple_pads(dig_out_pads,
78 ARRAY_SIZE(dig_out_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +000079
80 /* Switch both output drivers off */
Stefano Babicfc05b902012-08-19 21:33:50 +000081 gpio_direction_output(IMX_GPIO_NR(1, 7), 0);
82 gpio_direction_output(IMX_GPIO_NR(1, 6), 0);
Matthias Weisser82001ef2011-07-06 00:28:33 +000083
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000084 /* Setup of key input pin */
85 imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_KPP_ROW0__GPIO_2_29, 0));
Stefano Babicfc05b902012-08-19 21:33:50 +000086 gpio_direction_input(IMX_GPIO_NR(2, 29));
Matthias Weisser82001ef2011-07-06 00:28:33 +000087
88 /* Setup of status LED outputs */
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000089 imx_iomux_v3_setup_multiple_pads(led_pads, ARRAY_SIZE(led_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +000090
91 /* Switch both LEDs off */
Stefano Babicfc05b902012-08-19 21:33:50 +000092 gpio_direction_output(IMX_GPIO_NR(4, 21), 0);
93 gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
Matthias Weisser82001ef2011-07-06 00:28:33 +000094
95 /* Setup of CAN1 and CAN2 signals */
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000096 imx_iomux_v3_setup_multiple_pads(can_pads, ARRAY_SIZE(can_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +000097
98 /* Setup of I2C3 signals */
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +000099 imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +0000100
Matthias Weisser82001ef2011-07-06 00:28:33 +0000101 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
102
103 return 0;
104}
105
106int board_late_init(void)
107{
108 const char *e;
109
110#ifdef CONFIG_FEC_MXC
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +0000111/*
112 * FIXME: need to revisit this
113 * The original code enabled PUE and 100-k pull-down without PKE, so the right
114 * value here is likely:
115 * 0 for no pull
116 * or:
117 * PAD_CTL_PUS_100K_DOWN for 100-k pull-down
118 */
119#define FEC_OUT_PAD_CTRL 0
Matthias Weisser82001ef2011-07-06 00:28:33 +0000120
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +0000121 static const iomux_v3_cfg_t fec_pads[] = {
122 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
123 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
124 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
125 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
126 NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
127 NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
128 MX25_PAD_FEC_MDIO__FEC_MDIO,
129 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
130 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
Matthias Weisser82001ef2011-07-06 00:28:33 +0000131
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +0000132 MX25_PAD_UPLL_BYPCLK__GPIO_3_16, /* LAN-RESET */
133 MX25_PAD_UART2_CTS__FEC_RX_ER, /* FEC_RX_ERR */
134 };
Matthias Weisser82001ef2011-07-06 00:28:33 +0000135
Benoît Thébaudeaua1bbe6f2013-05-03 10:32:17 +0000136 imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
Matthias Weisser82001ef2011-07-06 00:28:33 +0000137
138 /* assert PHY reset (low) */
Stefano Babicfc05b902012-08-19 21:33:50 +0000139 gpio_direction_output(IMX_GPIO_NR(3, 16), 0);
Matthias Weisser82001ef2011-07-06 00:28:33 +0000140
141 udelay(5000);
142
143 /* deassert PHY reset */
Stefano Babicfc05b902012-08-19 21:33:50 +0000144 gpio_set_value(IMX_GPIO_NR(3, 16), 1);
Matthias Weisser82001ef2011-07-06 00:28:33 +0000145
146 udelay(5000);
147#endif
148
Simon Glass64b723f2017-08-03 12:22:12 -0600149 e = env_get("gs_base_board");
Matthias Weisser82001ef2011-07-06 00:28:33 +0000150 if (e != NULL) {
151 if (strcmp(e, "G283") == 0) {
Stefano Babicfc05b902012-08-19 21:33:50 +0000152 int key = gpio_get_value(IMX_GPIO_NR(2, 29));
Matthias Weisser82001ef2011-07-06 00:28:33 +0000153
154 if (key) {
155 /* Switch on both LEDs to inidcate boot mode */
Stefano Babicfc05b902012-08-19 21:33:50 +0000156 gpio_set_value(IMX_GPIO_NR(1, 29), 0);
157 gpio_set_value(IMX_GPIO_NR(4, 21), 0);
Matthias Weisser82001ef2011-07-06 00:28:33 +0000158
Simon Glass6a38e412017-08-03 12:22:09 -0600159 env_set("preboot", "run gs_slow_boot");
Matthias Weisser82001ef2011-07-06 00:28:33 +0000160 } else
Simon Glass6a38e412017-08-03 12:22:09 -0600161 env_set("preboot", "run gs_fast_boot");
Matthias Weisser82001ef2011-07-06 00:28:33 +0000162 }
163 }
164
165 return 0;
166}
167
168int dram_init(void)
169{
170 /* dram_init must store complete ramsize in gd->ram_size */
171 gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
172 PHYS_SDRAM_SIZE);
173 return 0;
174}