blob: 549ac8b48aeb27b86d1a72fd55a8870ff3f96770 [file] [log] [blame]
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09001/*
2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +09007 */
8
9#include <common.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000010#include <spi.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000011#include <lcd.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090012#include <asm/io.h>
Piotr Wilczeke372b552012-10-19 05:34:03 +000013#include <asm/gpio.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090014#include <asm/arch/adc.h>
Piotr Wilczek3b179142012-09-20 00:19:59 +000015#include <asm/arch/pinmux.h>
Piotr Wilczek6ce94c32012-09-20 00:20:00 +000016#include <asm/arch/watchdog.h>
Piotr Wilczek461c5e52012-10-19 05:34:07 +000017#include <ld9040.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000018#include <power/pmic.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010019#include <usb.h>
Marek Vasutf1be9cb2015-12-04 02:51:20 +010020#include <usb/dwc2_udc.h>
Lukasz Majewskibf731262011-12-15 10:32:12 +010021#include <asm/arch/cpu.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000022#include <power/max8998_pmic.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010023#include <libtizen.h>
Przemyslaw Marczak94df8012014-01-22 11:24:20 +010024#include <samsung/misc.h>
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +010025#include <usb_mass_storage.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060026#include <asm/mach-types.h>
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090027
28DECLARE_GLOBAL_DATA_PTR;
29
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090030unsigned int board_rev;
Jaehoon Chung40195a22017-01-09 14:47:50 +090031static int init_pmic_lcd(void);
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090032
33u32 get_board_rev(void)
34{
35 return board_rev;
36}
37
Jaehoon Chung40195a22017-01-09 14:47:50 +090038int exynos_power_init(void)
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090039{
Jaehoon Chung40195a22017-01-09 14:47:50 +090040 return init_pmic_lcd();
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090041}
42
Jaehoon Chung40195a22017-01-09 14:47:50 +090043static int get_hwrev(void)
Łukasz Majewski11be2832012-11-13 03:22:17 +000044{
Jaehoon Chung40195a22017-01-09 14:47:50 +090045 return board_rev & 0xFF;
Łukasz Majewski11be2832012-11-13 03:22:17 +000046}
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090047
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +090048static unsigned short get_adc_value(int channel)
49{
50 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
51 unsigned short ret = 0;
52 unsigned int reg;
53 unsigned int loop = 0;
54
55 writel(channel & 0xF, &adc->adcmux);
56 writel((1 << 14) | (49 << 6), &adc->adccon);
57 writel(1000 & 0xffff, &adc->adcdly);
58 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
59 udelay(10);
60 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
61 udelay(10);
62
63 do {
64 udelay(1);
65 reg = readl(&adc->adccon);
66 } while (!(reg & (1 << 15)) && (loop++ < 1000));
67
68 ret = readl(&adc->adcdat0) & 0xFFF;
69
70 return ret;
71}
72
Łukasz Majewski61f8b402012-03-26 21:53:48 +000073static int adc_power_control(int on)
74{
Jaehoon Chung40195a22017-01-09 14:47:50 +090075 struct udevice *dev;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000076 int ret;
Jaehoon Chung40195a22017-01-09 14:47:50 +090077 u8 reg;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000078
Jaehoon Chung40195a22017-01-09 14:47:50 +090079 ret = pmic_get("max8998-pmic", &dev);
80 if (ret) {
81 puts("Failed to get MAX8998!\n");
82 return ret;
83 }
Łukasz Majewski61f8b402012-03-26 21:53:48 +000084
Jaehoon Chung40195a22017-01-09 14:47:50 +090085 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
86 if (on)
87 reg |= MAX8998_LDO4;
88 else
89 reg &= ~MAX8998_LDO4;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000090
Jaehoon Chung40195a22017-01-09 14:47:50 +090091 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
92 if (ret) {
93 puts("MAX8998 LDO setting error\n");
94 return -EINVAL;
95 }
96
Simon Glass7bbb7d92016-11-23 06:34:40 -070097 return 0;
Łukasz Majewski61f8b402012-03-26 21:53:48 +000098}
99
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900100static unsigned int get_hw_revision(void)
101{
102 int hwrev, mode0, mode1;
103
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000104 adc_power_control(1);
105
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900106 mode0 = get_adc_value(1); /* HWREV_MODE0 */
107 mode1 = get_adc_value(2); /* HWREV_MODE1 */
108
109 /*
110 * XXX Always set the default hwrev as the latest board
111 * ADC = (voltage) / 3.3 * 4096
112 */
113 hwrev = 3;
114
115#define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
116 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
117 hwrev = 0x0; /* 0.01V 0.01V */
118 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
119 hwrev = 0x1; /* 610mV 0.01V */
120 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
121 hwrev = 0x2; /* 1.16V 0.01V */
122 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
123 hwrev = 0x3; /* 1.79V 0.01V */
124#undef IS_RANGE
125
126 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
127
Łukasz Majewski61f8b402012-03-26 21:53:48 +0000128 adc_power_control(0);
129
Minkyu Kang0aa1a6b2011-01-24 15:33:50 +0900130 return hwrev;
131}
132
133static void check_hw_revision(void)
134{
135 int hwrev;
136
137 hwrev = get_hw_revision();
138
139 board_rev |= hwrev;
140}
141
Lukasz Majewskibf731262011-12-15 10:32:12 +0100142#ifdef CONFIG_USB_GADGET
143static int s5pc210_phy_control(int on)
144{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900145 struct udevice *dev;
146 int ret;
147 u8 reg;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100148
Jaehoon Chung40195a22017-01-09 14:47:50 +0900149 ret = pmic_get("max8998-pmic", &dev);
150 if (ret) {
151 puts("Failed to get MAX8998!\n");
152 return ret;
153 }
Lukasz Majewskibf731262011-12-15 10:32:12 +0100154
155 if (on) {
Jaehoon Chung40195a22017-01-09 14:47:50 +0900156 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
157 reg |= MAX8998_SAFEOUT1;
158 ret |= pmic_reg_write(dev,
159 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
160
161 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
162 reg |= MAX8998_LDO3;
163 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
164
165 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
166 reg |= MAX8998_LDO8;
167 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
Lukasz Majewskibf731262011-12-15 10:32:12 +0100168
169 } else {
Jaehoon Chung40195a22017-01-09 14:47:50 +0900170 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
171 reg &= ~MAX8998_LDO8;
172 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
173
174 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
175 reg &= ~MAX8998_LDO3;
176 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
177
178 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
179 reg &= ~MAX8998_SAFEOUT1;
180 ret |= pmic_reg_write(dev,
181 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
Lukasz Majewskibf731262011-12-15 10:32:12 +0100182 }
183
184 if (ret) {
185 puts("MAX8998 LDO setting error!\n");
Jaehoon Chung40195a22017-01-09 14:47:50 +0900186 return -EINVAL;
Lukasz Majewskibf731262011-12-15 10:32:12 +0100187 }
Jaehoon Chung40195a22017-01-09 14:47:50 +0900188
Lukasz Majewskibf731262011-12-15 10:32:12 +0100189 return 0;
190}
191
Marek Vasut6939aca2015-12-04 02:23:29 +0100192struct dwc2_plat_otg_data s5pc210_otg_data = {
Lukasz Majewskibf731262011-12-15 10:32:12 +0100193 .phy_control = s5pc210_phy_control,
194 .regs_phy = EXYNOS4_USBPHY_BASE,
195 .regs_otg = EXYNOS4_USBOTG_BASE,
196 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
197 .usb_flags = PHY0_SLEEP,
198};
199#endif
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000200
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100201int board_usb_init(int index, enum usb_init_type init)
202{
203 debug("USB_udc_probe\n");
Marek Vasut01b61fa2015-12-04 02:26:33 +0100204 return dwc2_udc_probe(&s5pc210_otg_data);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100205}
206
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100207int exynos_early_init_f(void)
Piotr Wilczek6ce94c32012-09-20 00:20:00 +0000208{
209 wdt_stop();
210
211 return 0;
212}
Piotr Wilczeke372b552012-10-19 05:34:03 +0000213
Jaehoon Chung40195a22017-01-09 14:47:50 +0900214static int init_pmic_lcd(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000215{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900216 struct udevice *dev;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000217 unsigned char val;
218 int ret = 0;
219
Jaehoon Chung40195a22017-01-09 14:47:50 +0900220 ret = pmic_get("max8998-pmic", &dev);
221 if (ret) {
222 puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
223 return ret;
224 }
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000225
226 /* LDO7 1.8V */
227 val = 0x02; /* (1800 - 1600) / 100; */
Jaehoon Chung40195a22017-01-09 14:47:50 +0900228 ret |= pmic_reg_write(dev, MAX8998_REG_LDO7, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000229
230 /* LDO17 3.0V */
231 val = 0xe; /* (3000 - 1600) / 100; */
Jaehoon Chung40195a22017-01-09 14:47:50 +0900232 ret |= pmic_reg_write(dev, MAX8998_REG_LDO17, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000233
234 /* Disable unneeded regulators */
235 /*
236 * ONOFF1
237 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
238 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
239 */
240 val = 0xB9;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900241 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000242
243 /* ONOFF2
244 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
245 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
246 */
247 val = 0x50;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900248 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000249
250 /* ONOFF3
251 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
252 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
253 */
254 val = 0x00;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900255 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF3, val);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000256
Jaehoon Chung40195a22017-01-09 14:47:50 +0900257 if (ret) {
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000258 puts("LCD pmic initialisation error!\n");
Jaehoon Chung40195a22017-01-09 14:47:50 +0900259 return -EINVAL;
260 }
261
262 return 0;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000263}
264
Ajay Kumar41022a12013-02-21 23:52:57 +0000265void exynos_cfg_lcd_gpio(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000266{
267 unsigned int i, f3_end = 4;
268
269 for (i = 0; i < 8; i++) {
270 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530271 gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
272 gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
273 gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000274 /* pull-up/down disable */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530275 gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
276 gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
277 gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000278
279 /* drive strength to max (24bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530280 gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
281 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
282 gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
283 gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
284 gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
285 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000286 }
287
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530288 for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000289 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530290 gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000291 /* pull-up/down disable */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530292 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000293 /* drive strength to max (24bit) */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530294 gpio_set_drv(i, S5P_GPIO_DRV_4X);
295 gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000296 }
297
298 /* gpio pad configuration for LCD reset. */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600299 gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530300 gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000301}
302
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100303int mipi_power(void)
304{
305 return 0;
306}
307
Ajay Kumar41022a12013-02-21 23:52:57 +0000308void exynos_reset_lcd(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000309{
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530310 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000311 udelay(10000);
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530312 gpio_set_value(EXYNOS4_GPIO_Y45, 0);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000313 udelay(10000);
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530314 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000315 udelay(100);
316}
317
Ajay Kumar41022a12013-02-21 23:52:57 +0000318void exynos_lcd_power_on(void)
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000319{
Jaehoon Chung40195a22017-01-09 14:47:50 +0900320 struct udevice *dev;
321 int ret;
322 u8 reg;
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000323
Jaehoon Chung40195a22017-01-09 14:47:50 +0900324 ret = pmic_get("max8998-pmic", &dev);
325 if (ret) {
326 puts("Failed to get MAX8998!\n");
Minkyu Kang538f26b2012-12-10 22:43:57 +0900327 return;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900328 }
Minkyu Kang538f26b2012-12-10 22:43:57 +0900329
Jaehoon Chung40195a22017-01-09 14:47:50 +0900330 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
331 reg |= MAX8998_LDO17;
332 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
333 if (ret) {
334 puts("MAX8998 LDO setting error\n");
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000335 return;
Jaehoon Chung40195a22017-01-09 14:47:50 +0900336 }
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000337
Jaehoon Chung40195a22017-01-09 14:47:50 +0900338 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
339 reg |= MAX8998_LDO7;
340 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
341 if (ret) {
342 puts("MAX8998 LDO setting error\n");
343 return;
344 }
Piotr Wilczek461c5e52012-10-19 05:34:07 +0000345}
346
Ajay Kumar41022a12013-02-21 23:52:57 +0000347void exynos_cfg_ldo(void)
348{
349 ld9040_cfg_ldo();
350}
351
352void exynos_enable_ldo(unsigned int onoff)
353{
354 ld9040_enable_ldo(onoff);
355}
356
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100357int exynos_init(void)
Piotr Wilczeke372b552012-10-19 05:34:03 +0000358{
Piotr Wilczeke372b552012-10-19 05:34:03 +0000359 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100360
361 switch (get_hwrev()) {
362 case 0:
363 /*
364 * Set the low to enable LDO_EN
365 * But when you use the test board for eMMC booting
366 * you should set it HIGH since it removes the inverter
367 */
368 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600369 gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530370 gpio_direction_output(EXYNOS4_GPIO_E36, 0);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100371 break;
372 default:
373 /*
374 * Default reset state is High and there's no inverter
375 * But set it as HIGH to ensure
376 */
377 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
Simon Glass4f83d3d2014-10-20 19:48:39 -0600378 gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530379 gpio_direction_output(EXYNOS4_GPIO_E13, 1);
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100380 break;
381 }
Piotr Wilczeke372b552012-10-19 05:34:03 +0000382
Piotr Wilczeke372b552012-10-19 05:34:03 +0000383 check_hw_revision();
384 printf("HW Revision:\t0x%x\n", board_rev);
385
386 return 0;
387}
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100388
Simon Glassb4a967e2016-02-21 21:08:54 -0700389#ifdef CONFIG_LCD
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100390void exynos_lcd_misc_init(vidinfo_t *vid)
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100391{
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100392#ifdef CONFIG_TIZEN
393 get_tizen_logo_info(vid);
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100394#endif
Piotr Wilczek0ada4ad2014-03-07 14:59:47 +0100395
396 /* for LD9040. */
397 vid->pclk_name = 1; /* MPLL */
398 vid->sclk_div = 1;
399
Simon Glass6a38e412017-08-03 12:22:09 -0600400 env_set("lcdinfo", "lcd=ld9040");
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100401}
Simon Glassb4a967e2016-02-21 21:08:54 -0700402#endif