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Ashish Kumar227b4bc2017-08-31 16:12:54 +05301/*
2 * Copyright 2017 NXP
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __LS1088A_DDR_H__
8#define __LS1088A_DDR_H__
9struct board_specific_parameters {
10 u32 n_ranks;
11 u32 datarate_mhz_high;
12 u32 rank_gb;
13 u32 clk_adjust;
14 u32 wrlvl_start;
15 u32 wrlvl_ctl_2;
16 u32 wrlvl_ctl_3;
17};
18
19/*
20 * These tables contain all valid speeds we want to override with board
21 * specific parameters. datarate_mhz_high values need to be in ascending order
22 * for each n_ranks group.
23 */
24
25static const struct board_specific_parameters udimm0[] = {
26 /*
27 * memory controller 0
28 * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
29 * ranks| mhz| GB |adjst| start | ctl2 | ctl3
30 */
31#if defined(CONFIG_TARGET_LS1088ARDB)
32
33 {2, 1666, 0, 8, 8, 0x090A0B0E, 0x0F10110D,},
34 {2, 1900, 0, 4, 7, 0x09090B0D, 0x0E10120B,},
35 {2, 2300, 0, 8, 9, 0x0A0C0E11, 0x1214160F,},
36 {}
Ashish Kumar1ef4c772017-08-31 16:12:55 +053037#elif defined(CONFIG_TARGET_LS1088AQDS)
38 {2, 1666, 0, 8, 8, 0x0A0A0C0E, 0x0F10110C,},
39 {2, 1900, 0, 4, 7, 0x09090B0D, 0x0E10120B,},
40 {2, 2300, 0, 4, 9, 0x0A0C0D11, 0x1214150E,},
41 {}
Ashish Kumar227b4bc2017-08-31 16:12:54 +053042
43#endif
44};
45
46static const struct board_specific_parameters *udimms[] = {
47 udimm0,
48};
49#endif