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wdenkda27dcf2002-09-10 19:19:06 +00001/*
2 * (C) Copyright 2000
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * Configuation settings for the EP7312 board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/*
wdenkda27dcf2002-09-10 19:19:06 +000031 * High Level Configuration Options
32 * (easy to change)
33 */
34#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
35#define CONFIG_EP7312 1 /* on an EP7312 Board */
36#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
37#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
38
39#undef CONFIG_USE_IRQ /* don't need them anymore */
40
41/*
42 * Size of malloc() pool
43 */
wdenk699b13a2002-11-03 18:03:52 +000044#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
wdenkc0aa5c52003-12-06 19:49:23 +000045#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
wdenkda27dcf2002-09-10 19:19:06 +000046
47/*
48 * Hardware drivers
49 */
50#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
51#define CS8900_BASE 0x20000000
52#define CS8900_BUS16 1
53#undef CS8900_BUS32
54
55/*
56 * select serial console configuration
57 */
58#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
59
60/* allow to overwrite serial and ethaddr */
61#define CONFIG_ENV_OVERWRITE
62
63#define CONFIG_BAUDRATE 9600
64
65#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
66
67#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_JFFS2)
68
69/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
70#include <cmd_confdefs.h>
71
72#define CONFIG_BOOTDELAY 3
73#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
74#define CONFIG_ETHADDR 08:00:3e:21:c7:f7
75/*#define CONFIG_NETMASK 255.255.0.0 */
76/*#define CONFIG_IPADDR 172.22.2.128 */
77/*#define CONFIG_SERVERIP 172.22.2.126 */
78/*#define CONFIG_BOOTFILE "impa7" */
79#define CONFIG_BOOTCOMMAND "bootp;bootm"
80
81#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
82#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
83#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
84#endif
85
86/*
87 * Miscellaneous configurable options
88 */
89#define CFG_LONGHELP /* undef to save memory */
90#define CFG_PROMPT "EP7312 # " /* Monitor Command Prompt */
91#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
92#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
93#define CFG_MAXARGS 16 /* max number of command args */
94#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
95
96#define CFG_MEMTEST_START 0xc0400000 /* memtest works on */
97#define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
98
99#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
100
101#define CFG_LOAD_ADDR 0xc0500000 /* default load address */
102
103#define CFG_HZ 2000 /* decrementer freq: 2 kHz */
104
105 /* valid baudrates */
106#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
107
108/*-----------------------------------------------------------------------
109 * Stack sizes
110 *
111 * The stack sizes are set up in start.S using the settings below
112 */
113#define CONFIG_STACKSIZE (128*1024) /* regular stack */
114#ifdef CONFIG_USE_IRQ
115#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
116#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
117#endif
118
119/*-----------------------------------------------------------------------
120 * Physical Memory Map
121 */
122#define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */
123#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
124#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
125
126#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
127#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
128
129#define CFG_FLASH_BASE PHYS_FLASH_1
130
131/*-----------------------------------------------------------------------
132 * FLASH and environment organization
133 */
134#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
135#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
136
137/* timeout values are in ticks */
138#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
139#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
140
141#define CFG_ENV_IS_IN_FLASH 1
142#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */
143#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
144
145/* Flash banks JFFS2 should use */
146#define CFG_JFFS2_FIRST_BANK 0
147#define CFG_JFFS2_FIRST_SECTOR 2
148#define CFG_JFFS2_NUM_BANKS 1
149
150#endif /* __CONFIG_H */