Ricardo Ribalda Delgado | a8822a7 | 2008-07-17 12:47:09 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 |
| 3 | * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es |
| 4 | * This work has been supported by: QTechnology http://qtec.com/ |
| 5 | * based on xparameters-ml507.h by Xilinx |
| 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Ricardo Ribalda Delgado | a8822a7 | 2008-07-17 12:47:09 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef XPARAMETER_H |
| 11 | #define XPARAMETER_H |
| 12 | |
Ricardo Ribalda Delgado | f84496a | 2008-09-01 13:09:39 -0400 | [diff] [blame] | 13 | #define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 |
| 14 | #define XPAR_IIC_EEPROM_BASEADDR 0x81600000 |
| 15 | #define XPAR_INTC_0_BASEADDR 0x81800000 |
| 16 | #define XPAR_UARTLITE_0_BASEADDR 0x84000000 |
| 17 | #define XPAR_FLASH_MEM0_BASEADDR 0xFE000000 |
| 18 | #define XPAR_PLB_CLOCK_FREQ_HZ 100000000 |
| 19 | #define XPAR_CORE_CLOCK_FREQ_HZ 400000000 |
| 20 | #define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 |
Ricardo Ribalda Delgado | 2a019eb | 2008-07-21 20:30:07 +0200 | [diff] [blame] | 21 | #define XPAR_UARTLITE_0_BAUDRATE 9600 |
Ricardo Ribalda Delgado | a8822a7 | 2008-07-17 12:47:09 +0200 | [diff] [blame] | 22 | |
| 23 | #endif |