Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 0e97cad6c4b91b8bd5e47eb7e94aa3683ac5ee6c / . / configs / at91sam9x5ek_dataflash_defconfig
blob: b82b0a714c70ccf695be09de9d83c786ff60f706 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_ARM=y
Masahiro Yamadaaf908ee2015-02-20 17:04:01 +0900[diff] [blame]2CONFIG_ARCH_AT91=y
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]3CONFIG_TARGET_AT91SAM9X5EK=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]4CONFIG_SYS_MALLOC_F_LEN=0x2000
5CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]6CONFIG_DEBUG_UART=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]7CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_DATAFLASH"
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]8CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]9CONFIG_USE_BOOTARGS=y
10CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]11# CONFIG_CONSOLE_MUX is not set
12CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]13# CONFIG_DISPLAY_BOARDINFO is not set
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]14CONFIG_HUSH_PARSER=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]15CONFIG_SYS_PROMPT="U-Boot> "
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]16CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]17# CONFIG_CMD_IMI is not set
18# CONFIG_CMD_IMLS is not set
19# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]20# CONFIG_CMD_FPGA is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]21CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]22CONFIG_CMD_NAND=y
23CONFIG_CMD_NAND_TRIMFFS=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]24CONFIG_CMD_SF=y
25CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]26# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]27CONFIG_CMD_DHCP=y
28CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]29CONFIG_CMD_FAT=y
Heiko Schocher09dbb852016-09-21 07:58:19 +0200[diff] [blame]30CONFIG_CMD_UBI=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]31CONFIG_OF_CONTROL=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]32CONFIG_ENV_IS_IN_SPI_FLASH=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]33CONFIG_DM=y
34CONFIG_CLK=y
35CONFIG_CLK_AT91=y
36CONFIG_AT91_UTMI=y
37CONFIG_DM_GPIO=y
38CONFIG_AT91_GPIO=y
39CONFIG_DM_MMC=y
40CONFIG_GENERIC_ATMEL_MCI=y
41CONFIG_DM_SPI_FLASH=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]42CONFIG_SPI_FLASH=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]43CONFIG_SPI_FLASH_ATMEL=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]44CONFIG_DM_ETH=y
45CONFIG_MACB=y
46CONFIG_PINCTRL=y
47CONFIG_PINCTRL_AT91=y
48CONFIG_DM_SERIAL=y
Wenyou Yanga9606f02017-04-18 14:51:56 +0800[diff] [blame]49CONFIG_DEBUG_UART_ATMEL=y
50CONFIG_DEBUG_UART_BASE=0xfffff200
51CONFIG_DEBUG_UART_CLOCK=132000000
52CONFIG_DEBUG_UART_BOARD_INIT=y
53CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]54CONFIG_ATMEL_USART=y
55CONFIG_DM_SPI=y
56CONFIG_ATMEL_SPI=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]57CONFIG_TIMER=y
58CONFIG_ATMEL_PIT_TIMER=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]59CONFIG_USB=y
Wenyou Yangf345e282017-04-18 14:51:54 +0800[diff] [blame]60CONFIG_DM_USB=y
61CONFIG_USB_EHCI_HCD=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]62CONFIG_USB_STORAGE=y
Simon Glass169bb3b2016-10-17 20:12:56 -0600[diff] [blame]63CONFIG_LCD=y