wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 4 | * Marius Groeger <mgroeger@sysgo.de> |
| 5 | * |
| 6 | * (C) Copyright 2002 |
| 7 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 8 | * Alex Zuepke <azu@sysgo.de> |
| 9 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 10 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | /* |
| 14 | * CPU specific code |
| 15 | */ |
| 16 | |
| 17 | #include <common.h> |
| 18 | #include <command.h> |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame] | 19 | #include <asm/system.h> |
Albert ARIBAUD | 21505f9 | 2014-04-15 16:13:48 +0200 | [diff] [blame] | 20 | #include <asm/io.h> |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 21 | |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 22 | #ifdef CONFIG_USE_IRQ |
| 23 | DECLARE_GLOBAL_DATA_PTR; |
| 24 | #endif |
| 25 | |
Jean-Christophe PLAGNIOL-VILLARD | e6b5f1b | 2009-04-05 13:06:31 +0200 | [diff] [blame] | 26 | static void cache_flush(void); |
| 27 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 28 | int cleanup_before_linux (void) |
| 29 | { |
| 30 | /* |
| 31 | * this function is called just before we call linux |
| 32 | * it prepares the processor for linux |
| 33 | * |
| 34 | * just disable everything that can disturb booting linux |
| 35 | */ |
| 36 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 37 | disable_interrupts (); |
| 38 | |
| 39 | /* turn off I-cache */ |
Jean-Christophe PLAGNIOL-VILLARD | e6b5f1b | 2009-04-05 13:06:31 +0200 | [diff] [blame] | 40 | icache_disable(); |
| 41 | dcache_disable(); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 42 | |
| 43 | /* flush I-cache */ |
Jean-Christophe PLAGNIOL-VILLARD | e6b5f1b | 2009-04-05 13:06:31 +0200 | [diff] [blame] | 44 | cache_flush(); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 45 | |
| 46 | return (0); |
| 47 | } |
| 48 | |
Jean-Christophe PLAGNIOL-VILLARD | e6b5f1b | 2009-04-05 13:06:31 +0200 | [diff] [blame] | 49 | /* flush I/D-cache */ |
| 50 | static void cache_flush (void) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 51 | { |
Jean-Christophe PLAGNIOL-VILLARD | e6b5f1b | 2009-04-05 13:06:31 +0200 | [diff] [blame] | 52 | unsigned long i = 0; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 53 | |
Jean-Christophe PLAGNIOL-VILLARD | e6b5f1b | 2009-04-05 13:06:31 +0200 | [diff] [blame] | 54 | asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 55 | } |
Albert ARIBAUD | 21505f9 | 2014-04-15 16:13:48 +0200 | [diff] [blame] | 56 | |
| 57 | #define RST_BASE 0x90030000 |
| 58 | #define RSRR 0x00 |
| 59 | #define RCSR 0x04 |
| 60 | |
| 61 | __attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused))) |
| 62 | { |
| 63 | /* repeat endlessly */ |
| 64 | while (1) { |
| 65 | writel(0, RST_BASE + RCSR); |
| 66 | writel(1, RST_BASE + RSRR); |
| 67 | } |
| 68 | } |