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Etienne Carriere78928e12020-09-09 18:44:04 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
Etienne Carriere528f9882022-05-31 18:09:25 +02003 * Copyright (C) 2019-2022 Linaro Limited
Etienne Carriere78928e12020-09-09 18:44:04 +02004 */
Patrick Delaunay1285f8e2021-10-28 19:13:13 +02005
6#define LOG_CATEGORY UCLASS_CLK
7
Etienne Carriere78928e12020-09-09 18:44:04 +02008#include <clk-uclass.h>
9#include <dm.h>
10#include <scmi_agent.h>
11#include <scmi_protocols.h>
12#include <asm/types.h>
Etienne Carriere4c4ec902022-02-21 09:22:42 +010013#include <linux/clk-provider.h>
14
15static int scmi_clk_get_num_clock(struct udevice *dev, size_t *num_clocks)
16{
17 struct scmi_clk_protocol_attr_out out;
18 struct scmi_msg msg = {
19 .protocol_id = SCMI_PROTOCOL_ID_CLOCK,
20 .message_id = SCMI_PROTOCOL_ATTRIBUTES,
21 .out_msg = (u8 *)&out,
22 .out_msg_sz = sizeof(out),
23 };
24 int ret;
25
AKASHI Takahiro7b3aa372023-10-11 19:06:54 +090026 ret = devm_scmi_process_msg(dev, &msg);
Etienne Carriere4c4ec902022-02-21 09:22:42 +010027 if (ret)
28 return ret;
29
30 *num_clocks = out.attributes & SCMI_CLK_PROTO_ATTR_COUNT_MASK;
31
32 return 0;
33}
34
35static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name)
36{
37 struct scmi_clk_attribute_in in = {
38 .clock_id = clkid,
39 };
40 struct scmi_clk_attribute_out out;
41 struct scmi_msg msg = {
42 .protocol_id = SCMI_PROTOCOL_ID_CLOCK,
43 .message_id = SCMI_CLOCK_ATTRIBUTES,
44 .in_msg = (u8 *)&in,
45 .in_msg_sz = sizeof(in),
46 .out_msg = (u8 *)&out,
47 .out_msg_sz = sizeof(out),
48 };
49 int ret;
50
AKASHI Takahiro7b3aa372023-10-11 19:06:54 +090051 ret = devm_scmi_process_msg(dev, &msg);
Etienne Carriere4c4ec902022-02-21 09:22:42 +010052 if (ret)
53 return ret;
54
Heinrich Schuchardtba9c8922022-04-26 23:26:31 +020055 *name = strdup(out.clock_name);
Etienne Carriere4c4ec902022-02-21 09:22:42 +010056
57 return 0;
58}
Etienne Carriere78928e12020-09-09 18:44:04 +020059
60static int scmi_clk_gate(struct clk *clk, int enable)
61{
62 struct scmi_clk_state_in in = {
63 .clock_id = clk->id,
64 .attributes = enable,
65 };
66 struct scmi_clk_state_out out;
67 struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK,
68 SCMI_CLOCK_CONFIG_SET,
69 in, out);
70 int ret;
71
AKASHI Takahiro7b3aa372023-10-11 19:06:54 +090072 ret = devm_scmi_process_msg(clk->dev, &msg);
Etienne Carriere78928e12020-09-09 18:44:04 +020073 if (ret)
74 return ret;
75
76 return scmi_to_linux_errno(out.status);
77}
78
79static int scmi_clk_enable(struct clk *clk)
80{
81 return scmi_clk_gate(clk, 1);
82}
83
84static int scmi_clk_disable(struct clk *clk)
85{
86 return scmi_clk_gate(clk, 0);
87}
88
89static ulong scmi_clk_get_rate(struct clk *clk)
90{
91 struct scmi_clk_rate_get_in in = {
92 .clock_id = clk->id,
93 };
94 struct scmi_clk_rate_get_out out;
95 struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK,
96 SCMI_CLOCK_RATE_GET,
97 in, out);
98 int ret;
99
AKASHI Takahiro7b3aa372023-10-11 19:06:54 +0900100 ret = devm_scmi_process_msg(clk->dev, &msg);
Etienne Carriere78928e12020-09-09 18:44:04 +0200101 if (ret < 0)
102 return ret;
103
104 ret = scmi_to_linux_errno(out.status);
105 if (ret < 0)
106 return ret;
107
108 return (ulong)(((u64)out.rate_msb << 32) | out.rate_lsb);
109}
110
111static ulong scmi_clk_set_rate(struct clk *clk, ulong rate)
112{
113 struct scmi_clk_rate_set_in in = {
114 .clock_id = clk->id,
115 .flags = SCMI_CLK_RATE_ROUND_CLOSEST,
116 .rate_lsb = (u32)rate,
117 .rate_msb = (u32)((u64)rate >> 32),
118 };
119 struct scmi_clk_rate_set_out out;
120 struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK,
121 SCMI_CLOCK_RATE_SET,
122 in, out);
123 int ret;
124
AKASHI Takahiro7b3aa372023-10-11 19:06:54 +0900125 ret = devm_scmi_process_msg(clk->dev, &msg);
Etienne Carriere78928e12020-09-09 18:44:04 +0200126 if (ret < 0)
127 return ret;
128
129 ret = scmi_to_linux_errno(out.status);
130 if (ret < 0)
131 return ret;
132
133 return scmi_clk_get_rate(clk);
134}
135
Etienne Carriere4c4ec902022-02-21 09:22:42 +0100136static int scmi_clk_probe(struct udevice *dev)
137{
138 struct clk *clk;
139 size_t num_clocks, i;
140 int ret;
141
AKASHI Takahiro7b3aa372023-10-11 19:06:54 +0900142 ret = devm_scmi_of_get_channel(dev);
Etienne Carriere528f9882022-05-31 18:09:25 +0200143 if (ret)
144 return ret;
145
Etienne Carriere4c4ec902022-02-21 09:22:42 +0100146 if (!CONFIG_IS_ENABLED(CLK_CCF))
147 return 0;
148
149 /* register CCF children: CLK UCLASS, no probed again */
150 if (device_get_uclass_id(dev->parent) == UCLASS_CLK)
151 return 0;
152
153 ret = scmi_clk_get_num_clock(dev, &num_clocks);
154 if (ret)
155 return ret;
156
157 for (i = 0; i < num_clocks; i++) {
Heinrich Schuchardtba9c8922022-04-26 23:26:31 +0200158 char *clock_name;
Etienne Carriere4c4ec902022-02-21 09:22:42 +0100159
Heinrich Schuchardtba9c8922022-04-26 23:26:31 +0200160 if (!scmi_clk_get_attibute(dev, i, &clock_name)) {
Etienne Carriere4c4ec902022-02-21 09:22:42 +0100161 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
162 if (!clk || !clock_name)
163 ret = -ENOMEM;
164 else
165 ret = clk_register(clk, dev->driver->name,
166 clock_name, dev->name);
167
168 if (ret) {
169 free(clk);
170 free(clock_name);
171 return ret;
172 }
173
174 clk_dm(i, clk);
175 }
176 }
177
178 return 0;
179}
180
Etienne Carriere78928e12020-09-09 18:44:04 +0200181static const struct clk_ops scmi_clk_ops = {
182 .enable = scmi_clk_enable,
183 .disable = scmi_clk_disable,
184 .get_rate = scmi_clk_get_rate,
185 .set_rate = scmi_clk_set_rate,
186};
187
188U_BOOT_DRIVER(scmi_clock) = {
189 .name = "scmi_clk",
190 .id = UCLASS_CLK,
191 .ops = &scmi_clk_ops,
Etienne Carriere528f9882022-05-31 18:09:25 +0200192 .probe = scmi_clk_probe,
Etienne Carriere78928e12020-09-09 18:44:04 +0200193};