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Simon Goldschmidt15616b52018-11-02 11:54:52 +01001// SPDX-License-Identifier: (GPL-2.0+ OR X11)
Marek Vasutba2ade92015-12-01 18:09:52 +01002/*
Marek Vasuta1c1ec12019-06-27 00:19:32 +02003 * Copyright (C) 2015-2019 Marek Vasut <marex@denx.de>
Marek Vasutba2ade92015-12-01 18:09:52 +01004 */
5
6#include "socfpga_cyclone5.dtsi"
Simon Goldschmidt15616b52018-11-02 11:54:52 +01007#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/input/input.h>
Marek Vasutba2ade92015-12-01 18:09:52 +01009
10/ {
Marek Vasut13da18c2019-06-27 00:19:31 +020011 model = "Softing VIN|ING FPGA";
Simon Goldschmidt15616b52018-11-02 11:54:52 +010012 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
Marek Vasutba2ade92015-12-01 18:09:52 +010013
14 chosen {
Simon Goldschmidt15616b52018-11-02 11:54:52 +010015 bootargs = "earlyprintk";
Simon Goldschmidt3854a1a2018-08-13 21:34:33 +020016 stdout-path = "serial0:115200n8";
Marek Vasutba2ade92015-12-01 18:09:52 +010017 };
18
Simon Goldschmidt15616b52018-11-02 11:54:52 +010019 memory@0 {
20 name = "memory";
21 device_type = "memory";
22 reg = <0x0 0x40000000>; /* 1GB */
23 };
24
Marek Vasutba2ade92015-12-01 18:09:52 +010025 aliases {
Simon Goldschmidt15616b52018-11-02 11:54:52 +010026 /*
27 * This allow the ethaddr uboot environment variable contents
28 * to be added to the gmac1 device tree blob.
29 */
Marek Vasutba2ade92015-12-01 18:09:52 +010030 ethernet0 = &gmac1;
Simon Goldschmidt15616b52018-11-02 11:54:52 +010031 ethernet1 = &gmac0;
Marek Vasutba2ade92015-12-01 18:09:52 +010032 };
33
Simon Goldschmidt15616b52018-11-02 11:54:52 +010034 gpio-keys {
35 compatible = "gpio-keys";
36
37 hps_temp0 {
38 label = "BTN_0"; /* TEMP_OS */
39 gpios = <&portc 18 GPIO_ACTIVE_LOW>; /* HPS_GPIO60 */
40 linux,code = <BTN_0>;
41 };
42
43 hps_hkey0 {
44 label = "BTN_1"; /* DIS_PWR */
45 gpios = <&portc 19 GPIO_ACTIVE_LOW>; /* HPS_GPIO61 */
46 linux,code = <BTN_1>;
47 };
48
49 hps_hkey1 {
50 label = "hps_hkey1"; /* POWER_DOWN */
51 gpios = <&portc 20 GPIO_ACTIVE_LOW>; /* HPS_GPIO62 */
52 linux,code = <KEY_POWER>;
53 };
Marek Vasutba2ade92015-12-01 18:09:52 +010054 };
55
Simon Goldschmidt15616b52018-11-02 11:54:52 +010056 regulator-usb-nrst {
57 compatible = "regulator-fixed";
58 regulator-name = "usb_nrst";
59 regulator-min-microvolt = <5000000>;
60 regulator-max-microvolt = <5000000>;
61 gpio = <&portb 5 GPIO_ACTIVE_HIGH>;
62 startup-delay-us = <70000>;
63 enable-active-high;
64 regulator-always-on;
Marek Vasutba2ade92015-12-01 18:09:52 +010065 };
66};
67
Marek Vasuta1c1ec12019-06-27 00:19:32 +020068&gmac0 {
69 status = "disabled";
70 phy-mode = "gmii";
71};
72
Marek Vasutba2ade92015-12-01 18:09:52 +010073&gmac1 {
74 status = "okay";
75 phy-mode = "rgmii";
Simon Goldschmidt15616b52018-11-02 11:54:52 +010076 phy-handle = <&phy1>;
Marek Vasutba2ade92015-12-01 18:09:52 +010077
Simon Goldschmidt15616b52018-11-02 11:54:52 +010078 snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;
79 snps,reset-active-low;
80 snps,reset-delays-us = <10000 10000 10000>;
81
82 mdio0 {
83 #address-cells = <1>;
84 #size-cells = <0>;
85 compatible = "snps,dwmac-mdio";
86 phy1: ethernet-phy@1 {
87 reg = <1>;
88 rxd0-skew-ps = <0>;
89 rxd1-skew-ps = <0>;
90 rxd2-skew-ps = <0>;
91 rxd3-skew-ps = <0>;
Marek Vasuta1c1ec12019-06-27 00:19:32 +020092 txd0-skew-ps = <0>;
93 txd1-skew-ps = <0>;
94 txd2-skew-ps = <0>;
95 txd3-skew-ps = <0>;
Simon Goldschmidt15616b52018-11-02 11:54:52 +010096 txen-skew-ps = <0>;
Marek Vasuta1c1ec12019-06-27 00:19:32 +020097 txc-skew-ps = <1860>;
Simon Goldschmidt15616b52018-11-02 11:54:52 +010098 rxdv-skew-ps = <0>;
Marek Vasuta1c1ec12019-06-27 00:19:32 +020099 rxc-skew-ps = <1860>;
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100100 };
101 };
Marek Vasutba2ade92015-12-01 18:09:52 +0100102};
103
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100104&gpio0 { /* GPIO 0..29 */
Marek Vasutba2ade92015-12-01 18:09:52 +0100105 status = "okay";
106};
107
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100108&gpio1 { /* GPIO 30..57 */
Marek Vasutba2ade92015-12-01 18:09:52 +0100109 status = "okay";
110};
111
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100112&gpio2 { /* GPIO 58..66 (HLGPI 0..13 at offset 13) */
Marek Vasutba2ade92015-12-01 18:09:52 +0100113 status = "okay";
114};
115
116&i2c0 {
117 status = "okay";
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100118
119 gpio: pca9557@1f {
120 compatible = "nxp,pca9557";
121 reg = <0x1f>;
122 gpio-controller;
123 #gpio-cells = <2>;
124 };
125
126 temp: lm75@48 {
127 compatible = "lm75";
128 reg = <0x48>;
129 };
130
131 at24@50 {
132 compatible = "atmel,24c01";
133 pagesize = <8>;
134 reg = <0x50>;
135 };
136
137 i2cswitch@70 {
138 compatible = "nxp,pca9548";
139 #address-cells = <1>;
140 #size-cells = <0>;
141 reg = <0x70>;
142
143 i2c@0 {
144 #address-cells = <1>;
145 #size-cells = <0>;
146 reg = <0>;
147 };
148
149 i2c@1 {
150 #address-cells = <1>;
151 #size-cells = <0>;
152 reg = <1>;
153 };
154
155 i2c@2 {
156 #address-cells = <1>;
157 #size-cells = <0>;
158 reg = <2>;
159 };
160
161 i2c@3 {
162 #address-cells = <1>;
163 #size-cells = <0>;
164 reg = <3>;
165 };
166
167 i2c@4 {
168 #address-cells = <1>;
169 #size-cells = <0>;
170 reg = <4>;
171 };
172
173 i2c@5 {
174 #address-cells = <1>;
175 #size-cells = <0>;
176 reg = <5>;
177 };
178
179 i2c@6 { /* Backplane EEPROM */
180 #address-cells = <1>;
181 #size-cells = <0>;
182 reg = <6>;
183 eeprom@51 {
184 compatible = "atmel,24c01";
185 pagesize = <8>;
186 reg = <0x51>;
187 };
188 };
189
190 i2c@7 { /* Power board EEPROM */
191 #address-cells = <1>;
192 #size-cells = <0>;
193 reg = <7>;
194 eeprom@51 {
195 compatible = "atmel,24c01";
196 pagesize = <8>;
197 reg = <0x51>;
198 };
199 };
200 };
201};
202
203&i2c1 {
204 status = "okay";
205 clock-frequency = <100000>;
Marek Vasutba2ade92015-12-01 18:09:52 +0100206
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100207 at24@50 {
208 compatible = "atmel,24c02";
209 pagesize = <8>;
210 reg = <0x50>;
Marek Vasutba2ade92015-12-01 18:09:52 +0100211 };
212};
213
214&qspi {
215 status = "okay";
Marek Vasutba2ade92015-12-01 18:09:52 +0100216
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100217 n25q128@0 {
Marek Vasutba2ade92015-12-01 18:09:52 +0100218 #address-cells = <1>;
219 #size-cells = <1>;
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100220 compatible = "n25q128";
221 reg = <0>; /* chip select */
222 spi-max-frequency = <100000000>;
Marek Vasutba2ade92015-12-01 18:09:52 +0100223 m25p,fast-read;
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100224
225 cdns,page-size = <256>;
226 cdns,block-size = <16>;
227 cdns,read-delay = <4>;
Jason Rushfeaa3f92018-01-23 17:13:10 -0600228 cdns,tshsl-ns = <50>;
229 cdns,tsd2d-ns = <50>;
230 cdns,tchsh-ns = <4>;
231 cdns,tslch-ns = <4>;
Marek Vasutba2ade92015-12-01 18:09:52 +0100232 };
233
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100234 n25q00@1 {
Marek Vasutba2ade92015-12-01 18:09:52 +0100235 #address-cells = <1>;
236 #size-cells = <1>;
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100237 compatible = "n25q00";
238 reg = <1>; /* chip select */
239 spi-max-frequency = <100000000>;
Marek Vasutba2ade92015-12-01 18:09:52 +0100240 m25p,fast-read;
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100241
242 cdns,page-size = <256>;
243 cdns,block-size = <16>;
244 cdns,read-delay = <4>;
Jason Rushfeaa3f92018-01-23 17:13:10 -0600245 cdns,tshsl-ns = <50>;
246 cdns,tsd2d-ns = <50>;
247 cdns,tchsh-ns = <4>;
248 cdns,tslch-ns = <4>;
Marek Vasutba2ade92015-12-01 18:09:52 +0100249 };
250};
251
252&usb0 {
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100253 dr_mode = "host";
Marek Vasutba2ade92015-12-01 18:09:52 +0100254 status = "okay";
255};
256
257&usb1 {
Simon Goldschmidt15616b52018-11-02 11:54:52 +0100258 dr_mode = "peripheral";
Marek Vasutba2ade92015-12-01 18:09:52 +0100259 status = "okay";
260};