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Sandeep Paulraj1830bba2009-10-10 12:00:47 -04001/*
2 * Copyright (C) 2009 Texas Instruments Incorporated
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Sandeep Paulraj1830bba2009-10-10 12:00:47 -04005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
10/* Spectrum Digital TMS320DM6467 EVM board */
11#define DAVINCI_DM6467EVM
Sandeep Paulraj0f450952010-12-28 17:38:22 -050012#define CONFIG_SYS_USE_NAND
13#define CONFIG_SYS_NAND_SMALLPAGE
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040014
15#define CONFIG_SKIP_LOWLEVEL_INIT
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040016
17/* SoC Configuration */
18#define CONFIG_ARM926EJS /* arm926ejs CPU */
Sandeep Paulraj0f450952010-12-28 17:38:22 -050019
20/* Clock rates detection */
21#ifndef __ASSEMBLY__
22extern unsigned int davinci_arm_clk_get(void);
23#endif
24
Sandeep Paulraj0f450952010-12-28 17:38:22 -050025/* Arm Clock frequency */
26#define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get()
27/* Timer Input clock freq */
28#define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2)
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040029#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040030#define CONFIG_SOC_DM646X
31
32/* EEPROM definitions for EEPROM */
33#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
34#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
35#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
36#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
37
38/* Memory Info */
39#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040040#define CONFIG_SYS_MEMTEST_START 0x80000000
41#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
42#define CONFIG_NR_DRAM_BANKS 1
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040043#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
44#define PHYS_SDRAM_1_SIZE (256 << 20) /* DDR size 256MB */
45
46/* Linux interfacing */
47#define CONFIG_CMDLINE_TAG
48#define CONFIG_SETUP_MEMORY_TAGS
49#define CONFIG_SYS_BARGSIZE 1024 /* Bootarg Size */
50#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
Manjunath Hadlieae752b2011-11-08 08:59:57 -050051#define CONFIG_REVISION_TAG
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040052
53/* Serial Driver info */
54#define CONFIG_SYS_NS16550
55#define CONFIG_SYS_NS16550_SERIAL
56#define CONFIG_SYS_NS16550_REG_SIZE 4
57#define CONFIG_SYS_NS16550_COM1 0x01c20000
58#define CONFIG_SYS_NS16550_CLK 24000000
59#define CONFIG_CONS_INDEX 1
60#define CONFIG_BAUDRATE 115200
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040061
62/* I2C Configuration */
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040063#define CONFIG_SYS_I2C
64#define CONFIG_SYS_I2C_DAVINCI
65#define CONFIG_SYS_DAVINCI_I2C_SPEED 80000
66#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040067
Sandeep Paulraj0f450952010-12-28 17:38:22 -050068/* Network & Ethernet Configuration */
69#define CONFIG_DRIVER_TI_EMAC
Sandeep Paulraj0f450952010-12-28 17:38:22 -050070#define CONFIG_MII
Sandeep Paulraj0f450952010-12-28 17:38:22 -050071#define CONFIG_BOOTP_DNS
72#define CONFIG_BOOTP_DNS2
73#define CONFIG_BOOTP_SEND_HOSTNAME
74#define CONFIG_NET_RETRY_COUNT 10
Sandeep Paulraj0f450952010-12-28 17:38:22 -050075#define CONFIG_CMD_NET
76
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040077/* Flash & Environment */
78#define CONFIG_SYS_NO_FLASH
79#ifdef CONFIG_SYS_USE_NAND
80#define CONFIG_NAND_DAVINCI
Nick Thompson789c8872009-12-12 12:12:26 -050081#define CONFIG_SYS_NAND_CS 2
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040082#undef CONFIG_ENV_IS_IN_FLASH
83#define CONFIG_ENV_IS_IN_NAND
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040084#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
85#define CONFIG_SYS_NAND_BASE_LIST {0x42000000, }
86#define CONFIG_SYS_NAND_HW_ECC
87#define CONFIG_SYS_MAX_NAND_DEVICE 1
88#define CONFIG_ENV_OFFSET 0
89#else
90#define CONFIG_ENV_IS_NOWHERE
91#define CONFIG_ENV_SIZE (4 << 10) /* 4 KiB */
92#endif
93
94/* U-Boot general configuration */
Sandeep Paulraj1830bba2009-10-10 12:00:47 -040095#define CONFIG_BOOTDELAY 3
96#define CONFIG_BOOTFILE "uImage" /* Boot file name */
97#define CONFIG_SYS_PROMPT "DM6467 EVM > " /* Monitor Command Prompt */
98#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
99#define CONFIG_SYS_PBSIZE \
100 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
101#define CONFIG_SYS_MAXARGS 16
102#define CONFIG_VERSION_VARIABLE
103#define CONFIG_AUTO_COMPLETE
104#define CONFIG_SYS_HUSH_PARSER
Sandeep Paulraj1830bba2009-10-10 12:00:47 -0400105#define CONFIG_CMDLINE_EDITING
106#define CONFIG_SYS_LONGHELP
107#define CONFIG_CRC32_VERIFY
108#define CONFIG_MX_CYCLIC
109#define CONFIG_BOOTCOMMAND "source 0x82080000; dhcp; bootm"
110#define CONFIG_BOOTARGS \
111 "mem=120M console=ttyS0,115200n8 " \
112 "root=/dev/hda1 rw noinitrd ip=dhcp"
113
114/* U-Boot commands */
115#include <config_cmd_default.h>
116#define CONFIG_CMD_ASKENV
117#define CONFIG_CMD_DIAG
118#define CONFIG_CMD_I2C
119#define CONFIG_CMD_MII
120#define CONFIG_CMD_SAVES
121#define CONFIG_CMD_EEPROM
Sandeep Paulraj0f450952010-12-28 17:38:22 -0500122#define CONFIG_CMD_PING
123#define CONFIG_CMD_DHCP
Sandeep Paulraj1830bba2009-10-10 12:00:47 -0400124#undef CONFIG_CMD_BDI
125#undef CONFIG_CMD_FPGA
126#undef CONFIG_CMD_SETGETDCR
127#ifdef CONFIG_SYS_USE_NAND
128#undef CONFIG_CMD_FLASH
129#undef CONFIG_CMD_IMLS
130#define CONFIG_CMD_NAND
131#endif
132
Hadli, Manjunath0dfccbe2012-02-06 00:30:44 +0000133#ifdef CONFIG_CMD_BDI
134#define CONFIG_CLOCKS
135#endif
136
Sandeep Paulraj5f679902010-12-11 20:38:57 -0500137#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
138
139#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
140#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
141#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
142 CONFIG_SYS_INIT_RAM_SIZE - \
143 GENERATED_GBL_DATA_SIZE)
144
Sandeep Paulraj1830bba2009-10-10 12:00:47 -0400145#endif /* __CONFIG_H */